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Searched refs:lane_mask (Results 1 – 24 of 24) sorted by relevance

/linux-6.15/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-common.h17 u8 lane_mask; member
25 .lane_mask = 0xff, \
33 .lane_mask = l, \
38 int num, u8 lane_mask) in qmp_configure_lane() argument
47 if (!(t->lane_mask & lane_mask)) in qmp_configure_lane()
H A Dphy-qcom-qmp-usb-legacy.c53 u8 lane_mask; member
60 .lane_mask = 0xff, \
67 .lane_mask = l, \
704 u8 lane_mask) in qmp_usb_legacy_configure_lane() argument
713 if (!(t->lane_mask & lane_mask)) in qmp_usb_legacy_configure_lane()
/linux-6.15/drivers/media/platform/qcom/camss/
H A Dcamss-csiphy-2ph-1-0.c32 u8 lane_mask; in csiphy_get_lane_mask() local
35 lane_mask = 1 << CAMSS_CSI_PHY_LN_CLK; in csiphy_get_lane_mask()
38 lane_mask |= 1 << lane_cfg->data[i].pos; in csiphy_get_lane_mask()
40 return lane_mask; in csiphy_get_lane_mask()
99 s64 link_freq, u8 lane_mask) in csiphy_lanes_enable() argument
114 val |= lane_mask << 1; in csiphy_lanes_enable()
H A Dcamss-csiphy-3ph-1-0.c608 u8 lane_mask; in csiphy_get_lane_mask() local
611 lane_mask = CSIPHY_3PH_CMN_CSI_COMMON_CTRL5_CLK_ENABLE; in csiphy_get_lane_mask()
614 lane_mask |= 1 << lane_cfg->data[i].pos; in csiphy_get_lane_mask()
616 return lane_mask; in csiphy_get_lane_mask()
638 s64 link_freq, u8 lane_mask) in csiphy_lanes_enable() argument
H A Dcamss-csiphy.h76 s64 link_freq, u8 lane_mask);
H A Dcamss-csiphy.c274 u8 lane_mask = csiphy->res->hw_ops->get_lane_mask(&cfg->csi2->lane_cfg); in csiphy_stream_on() local
290 if (cfg->combo_mode && (lane_mask & 0x18) == 0x18) { in csiphy_stream_on()
303 csiphy->res->hw_ops->lanes_enable(csiphy, cfg, link_freq, lane_mask); in csiphy_stream_on()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_combo_phy.c262 u8 lane_mask; in intel_combo_phy_power_up_lanes() local
269 lane_mask = PWR_DOWN_LN_3_1_0; in intel_combo_phy_power_up_lanes()
272 lane_mask = PWR_DOWN_LN_3_1; in intel_combo_phy_power_up_lanes()
275 lane_mask = PWR_DOWN_LN_3; in intel_combo_phy_power_up_lanes()
281 lane_mask = PWR_UP_ALL_LANES; in intel_combo_phy_power_up_lanes()
287 lane_mask = lane_reversal ? PWR_DOWN_LN_2_1_0 : in intel_combo_phy_power_up_lanes()
291 lane_mask = lane_reversal ? PWR_DOWN_LN_1_0 : in intel_combo_phy_power_up_lanes()
298 lane_mask = PWR_UP_ALL_LANES; in intel_combo_phy_power_up_lanes()
304 PWR_DOWN_LN_MASK, lane_mask); in intel_combo_phy_power_up_lanes()
H A Dintel_cx0_phy.c49 static int lane_mask_to_lane(u8 lane_mask) in lane_mask_to_lane() argument
52 hweight8(lane_mask) != 1)) in lane_mask_to_lane()
55 return ilog2(lane_mask); in lane_mask_to_lane()
269 u8 lane_mask, u16 addr) in intel_cx0_read() argument
271 int lane = lane_mask_to_lane(lane_mask); in intel_cx0_read()
361 for_each_cx0_lane_in_mask(lane_mask, lane) in intel_cx0_write()
414 for_each_cx0_lane_in_mask(lane_mask, lane) in intel_cx0_rmw()
488 if (!(lane_mask & owned_lane_mask)) in intel_cx0_phy_set_signal_levels()
2786 for_each_cx0_lane_in_mask(lane_mask, lane) in intel_cx0_get_powerdown_update()
2804 u8 lane_mask, u8 state) in intel_cx0_powerdown_change_sequence() argument
[all …]
H A Dintel_tc.c271 u32 lane_mask; in intel_tc_port_get_lane_mask() local
273 lane_mask = intel_de_read(i915, PORT_TX_DFLEXDPSP(tc->phy_fia)); in intel_tc_port_get_lane_mask()
275 drm_WARN_ON(&i915->drm, lane_mask == 0xffffffff); in intel_tc_port_get_lane_mask()
278 lane_mask &= DP_LANE_ASSIGNMENT_MASK(tc->phy_fia_idx); in intel_tc_port_get_lane_mask()
279 return lane_mask >> DP_LANE_ASSIGNMENT_SHIFT(tc->phy_fia_idx); in intel_tc_port_get_lane_mask()
348 u32 lane_mask = 0; in intel_tc_port_get_max_lane_count() local
351 lane_mask = intel_tc_port_get_lane_mask(dig_port); in intel_tc_port_get_max_lane_count()
353 switch (lane_mask) { in intel_tc_port_get_max_lane_count()
355 MISSING_CASE(lane_mask); in intel_tc_port_get_max_lane_count()
H A Dg4x_dp.c699 unsigned int lane_mask = 0x0; in intel_enable_dp() local
702 lane_mask = intel_dp_unused_lane_mask(pipe_config->lane_count); in intel_enable_dp()
704 vlv_wait_port_ready(encoder, lane_mask); in intel_enable_dp()
H A Dintel_dpio_phy.c866 unsigned int lane_mask = in chv_phy_pre_pll_enable() local
878 chv_phy_powergate_lanes(encoder, true, lane_mask); in chv_phy_pre_pll_enable()
/linux-6.15/drivers/net/ethernet/meta/fbnic/
H A Dfbnic_mac.c464 u32 pcs_status, lane_mask = ~0; in fbnic_mac_get_pcs_link_status() local
473 lane_mask = 0xf; in fbnic_mac_get_pcs_link_status()
476 lane_mask = 3; in fbnic_mac_get_pcs_link_status()
481 lane_mask = 0x63; in fbnic_mac_get_pcs_link_status()
484 lane_mask = 5; in fbnic_mac_get_pcs_link_status()
487 lane_mask = 0xf; in fbnic_mac_get_pcs_link_status()
492 lane_mask = 1; in fbnic_mac_get_pcs_link_status()
499 lane_mask ^= FIELD_GET(FBNIC_SIG_PCS_OUT0_BLOCK_LOCK, in fbnic_mac_get_pcs_link_status()
503 lane_mask ^= FIELD_GET(FBNIC_SIG_PCS_OUT0_AMPS_LOCK, in fbnic_mac_get_pcs_link_status()
507 lane_mask ^= FIELD_GET(FBNIC_SIG_PCS_OUT1_FCFEC_LOCK, in fbnic_mac_get_pcs_link_status()
[all …]
/linux-6.15/drivers/video/fbdev/omap2/omapfb/dss/
H A Dcore.c60 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask) in dss_dsi_enable_pads() argument
67 return board_data->dsi_enable_pads(dsi_id, lane_mask); in dss_dsi_enable_pads()
70 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask) in dss_dsi_disable_pads() argument
77 return board_data->dsi_disable_pads(dsi_id, lane_mask); in dss_dsi_disable_pads()
H A Ddss.h192 int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
193 void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
/linux-6.15/include/linux/platform_data/
H A Domapdss.h26 int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask);
27 void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask);
/linux-6.15/arch/arm/mach-omap2/
H A Ddisplay.c111 static int omap_dsi_enable_pads(int dsi_id, unsigned lane_mask) in omap_dsi_enable_pads() argument
114 return omap4_dsi_mux_pads(dsi_id, lane_mask); in omap_dsi_enable_pads()
119 static void omap_dsi_disable_pads(int dsi_id, unsigned lane_mask) in omap_dsi_disable_pads() argument
/linux-6.15/drivers/media/platform/ti/cal/
H A Dcal-camerarx.c84 u32 lane_mask = CAL_CSI2_COMPLEXIO_CFG_CLOCK_POSITION_MASK; in cal_camerarx_lane_config() local
90 cal_set_field(&val, mipi_csi2->clock_lane + 1, lane_mask); in cal_camerarx_lane_config()
97 lane_mask <<= 4; in cal_camerarx_lane_config()
99 cal_set_field(&val, mipi_csi2->data_lanes[lane] + 1, lane_mask); in cal_camerarx_lane_config()
/linux-6.15/Documentation/ABI/testing/
H A Dsysfs-devices-platform-kunpeng_hccs53 What: /sys/devices/platform/HISI04Bx:00/chipX/dieY/hccsN/lane_mask
78 lane_mask: (RO) current lane mask of this port, every bit
/linux-6.15/drivers/soc/hisilicon/
H A Dkunpeng_hccs.h171 u8 lane_mask; /* indicate which lanes are used. */ member
H A Dkunpeng_hccs.c1019 return sysfs_emit(buf, "0x%x\n", link_status.lane_mask); in lane_mask_show()
1021 static struct kobj_attribute lane_mask_attr = __ATTR_RO(lane_mask);
/linux-6.15/drivers/media/platform/renesas/
H A Drcar-csi2.c927 const u32 lane_mask = (1 << lanes) - 1; in rcsi2_wait_phy_start() local
930 (rcsi2_read(priv, PHDLM_REG) & lane_mask) == lane_mask) in rcsi2_wait_phy_start()
/linux-6.15/drivers/pci/controller/
H A Dpci-tegra.c1994 static int tegra_pcie_get_regulators(struct tegra_pcie *pcie, u32 lane_mask) in tegra_pcie_get_regulators() argument
2042 if (lane_mask & 0x0f) in tegra_pcie_get_regulators()
2046 if (lane_mask & 0x30) in tegra_pcie_get_regulators()
/linux-6.15/drivers/phy/cadence/
H A Dphy-cadence-torrent.c1449 u8 lane_mask = (1 << dp->lanes) - 1; in cdns_torrent_dp_set_lanes() local
1453 lane_mask <<= clane; in cdns_torrent_dp_set_lanes()
1464 value |= ((~lane_mask) << PMA_TX_ELEC_IDLE_SHIFT) & in cdns_torrent_dp_set_lanes()
1481 value |= ((1 << (clane + i)) & lane_mask); in cdns_torrent_dp_set_lanes()
1492 value |= ((1 << (clane + i)) & lane_mask); in cdns_torrent_dp_set_lanes()
/linux-6.15/drivers/gpu/drm/omapdrm/dss/
H A Ddsi.c1542 static int dsi_enable_pads(struct dsi_data *dsi, unsigned int lane_mask) in dsi_enable_pads() argument
1545 return dsi_omap4_mux_pads(dsi, lane_mask); in dsi_enable_pads()
1547 return dsi_omap5_mux_pads(dsi, lane_mask); in dsi_enable_pads()