Home
last modified time | relevance | path

Searched refs:lane2 (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-usbdp.yaml61 3>;", assuming DP lane0 on Type-C phy lane2, DP lane1 on Type-C phy
64 phy lane1, DP lane2 on Type-C phy lane2, DP lane3 on Type-C phy lane3. If
H A Dqcom,msm8996-qmp-pcie-phy.yaml89 - lane2
/linux-6.15/Documentation/devicetree/bindings/pci/
H A Dmediatek-pcie-gen3.yaml86 enum: [ phy, mac, phy-lane0, phy-lane1, phy-lane2 ]
264 - const: phy-lane2
/linux-6.15/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h244 uint8_t lane2:2; /* Mapping for lane 2 */ member
/linux-6.15/arch/arm64/boot/dts/marvell/
H A Darmada-8040-mcbin.dtsi189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
/linux-6.15/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-j742s2-main-common.dtsi83 <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */
85 <0x18 0x3>, <0x1c 0x3>, /* SERDES1 lane2/3 select */
87 <0x28 0x3>, <0x2c 0x3>, /* SERDES2 lane2/3 select */
89 <0x48 0x3>, <0x4c 0x3>; /* SERDES4 lane2/3 select */
H A Dk3-j7200-main.dtsi40 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
H A Dk3-j721s2-main.dtsi65 <0x8 0x3>, <0xc 0x3>; /* SERDES0 lane2/3 select */
H A Dk3-j721e-main.dtsi56 <0x48 0x3>, <0x4c 0x3>; /* SERDES4 lane2/3 select */
/linux-6.15/arch/arm64/boot/dts/qcom/
H A Dmsm8996.dtsi739 reset-names = "lane2";