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Searched refs:kiq (Results 1 – 25 of 29) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_gfx.c302 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init_ring() local
343 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_fini() local
353 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_kiq_init() local
379 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_init() local
470 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_mqd_sw_fini() local
500 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kcq() local
515 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kcq()
550 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_id]; in amdgpu_gfx_disable_kgq() local
567 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_gfx_disable_kgq()
663 if (!kiq->pmf || !kiq->pmf->kiq_map_queues || !kiq->pmf->kiq_set_resources) in amdgpu_gfx_enable_kcq()
[all …]
H A Damdgpu_gmc.c703 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_gmc_flush_gpu_tlb_pasid() local
732 ndw = kiq->pmf->invalidate_tlbs_size + 8; in amdgpu_gmc_flush_gpu_tlb_pasid()
735 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
738 ndw += kiq->pmf->invalidate_tlbs_size; in amdgpu_gmc_flush_gpu_tlb_pasid()
740 spin_lock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
743 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
756 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
761 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in amdgpu_gmc_flush_gpu_tlb_pasid()
789 struct amdgpu_kiq *kiq = &adev->gfx.kiq[xcc_inst]; in amdgpu_gmc_fw_reg_write_reg_wait() local
790 struct amdgpu_ring *ring = &kiq->ring; in amdgpu_gmc_fw_reg_write_reg_wait()
[all …]
H A Damdgpu_amdkfd.c789 struct amdgpu_kiq *kiq = &adev->gfx.kiq[inst]; in amdgpu_amdkfd_unmap_hiq() local
790 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_amdkfd_unmap_hiq()
795 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in amdgpu_amdkfd_unmap_hiq()
815 spin_lock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
817 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size)) { in amdgpu_amdkfd_unmap_hiq()
818 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
823 kiq->pmf->kiq_unmap_queues(kiq_ring, ring, RESET_QUEUES, 0, 0); in amdgpu_amdkfd_unmap_hiq()
834 spin_unlock(&kiq->ring_lock); in amdgpu_amdkfd_unmap_hiq()
H A Dmes_v11_0.c1248 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v11_0_kiq_enable_queue() local
1252 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v11_0_kiq_enable_queue()
1273 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_queue_init()
1328 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v11_0_kiq_ring_init()
1330 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_kiq_ring_init()
1356 ring = &adev->gfx.kiq[0].ring; in mes_v11_0_mqd_sw_init()
1464 &adev->gfx.kiq[0].ring.mqd_gpu_addr, in mes_v11_0_sw_fini()
1465 &adev->gfx.kiq[0].ring.mqd_ptr); in mes_v11_0_sw_fini()
1471 amdgpu_ring_fini(&adev->gfx.kiq[0].ring); in mes_v11_0_sw_fini()
1565 mes_v11_0_kiq_setting(&adev->gfx.kiq[0].ring); in mes_v11_0_kiq_hw_init()
[all …]
H A Dmes_v12_0.c1339 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in mes_v12_0_kiq_enable_queue() local
1343 if (!kiq->pmf || !kiq->pmf->kiq_map_queues) in mes_v12_0_kiq_enable_queue()
1369 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_queue_init()
1444 spin_lock_init(&adev->gfx.kiq[0].ring_lock); in mes_v12_0_kiq_ring_init()
1446 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_kiq_ring_init()
1472 ring = &adev->gfx.kiq[0].ring; in mes_v12_0_mqd_sw_init()
1574 &adev->gfx.kiq[0].ring.mqd_gpu_addr, in mes_v12_0_sw_fini()
1575 &adev->gfx.kiq[0].ring.mqd_ptr); in mes_v12_0_sw_fini()
1576 amdgpu_ring_fini(&adev->gfx.kiq[0].ring); in mes_v12_0_sw_fini()
1644 mes_v12_0_kiq_setting(&adev->gfx.kiq[0].ring); in mes_v12_0_kiq_hw_init()
[all …]
H A Dgfx_v9_0.c3822 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
3847 if (adev->gfx.kiq[0].mqd_backup) in gfx_v9_0_kiq_init_queue()
4056 adev->gfx.kiq[0].ring.pipe, in gfx_v9_0_hw_fini()
4057 adev->gfx.kiq[0].ring.queue, 0, 0); in gfx_v9_0_hw_fini()
4179 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_kiq_read_clock() local
5711 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_ring_preempt_ib() local
5715 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_0_ring_preempt_ib()
7198 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_reset_kgq() local
7207 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_0_reset_kgq()
7244 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v9_0_reset_kcq() local
[all …]
H A Dgfx_v9_4_3.c1986 ((adev->doorbell_index.kiq + in gfx_v9_4_3_xcc_kiq_init_register()
2078 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2102 if (adev->gfx.kiq[xcc_id].mqd_backup) in gfx_v9_4_3_xcc_kiq_init_queue()
2288 adev->gfx.kiq[xcc_id].ring.pipe, in gfx_v9_4_3_xcc_fini()
2289 adev->gfx.kiq[xcc_id].ring.queue, 0, in gfx_v9_4_3_xcc_fini()
3518 struct amdgpu_kiq *kiq = &adev->gfx.kiq[ring->xcc_id]; in gfx_v9_4_3_reset_kcq() local
3519 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v9_4_3_reset_kcq()
3526 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v9_4_3_reset_kcq()
3529 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_4_3_reset_kcq()
3567 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v9_4_3_reset_kcq()
[all …]
H A Dgfx_v10_0.c4837 &adev->gfx.kiq[0].irq); in gfx_v10_0_sw_init()
7063 (adev->doorbell_index.kiq * 2) << 2); in gfx_v10_0_kiq_init_register()
7102 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
7125 if (adev->gfx.kiq[0].mqd_backup) in gfx_v10_0_kiq_init_queue()
8833 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_ring_preempt_ib() local
8837 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_ring_preempt_ib()
9494 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_reset_kgq() local
9504 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v10_0_reset_kgq()
9529 kiq->pmf->kiq_map_queues(kiq_ring, ring); in gfx_v10_0_reset_kgq()
9551 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v10_0_reset_kcq() local
[all …]
H A Damdgpu_amdkfd_gfx_v10_3.c280 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v10_3()
295 spin_lock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
322 spin_unlock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v10_3()
H A Dvega10_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_DOORBELL64_KIQ; in vega10_doorbell_index_init()
H A Damdgpu_amdkfd_gfx_v11.c265 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in hiq_mqd_load_v11()
280 spin_lock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v11()
307 spin_unlock(&adev->gfx.kiq[0].ring_lock); in hiq_mqd_load_v11()
H A Damdgpu_doorbell.h52 uint32_t kiq; member
H A Dvega20_reg_init.c60 adev->doorbell_index.kiq = AMDGPU_VEGA20_DOORBELL_KIQ; in vega20_doorbell_index_init()
H A Dgfx_v12_0.c394 adev->gfx.kiq[0].pmf = &gfx_v12_0_kiq_pm4_funcs; in gfx_v12_0_set_kiq_pm4_funcs()
2724 adev->gfx.kiq[0].ring.sched.ready = enable; in gfx_v12_0_cp_compute_enable()
2883 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_cp_set_doorbell_range()
3228 (adev->doorbell_index.kiq * 2) << 2); in gfx_v12_0_kiq_init_register()
3330 adev->gfx.kiq[0].ring.sched.ready = true; in gfx_v12_0_kiq_resume()
4496 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v12_0_ring_preempt_ib() local
4497 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v12_0_ring_preempt_ib()
4503 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v12_0_ring_preempt_ib()
4506 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v12_0_ring_preempt_ib()
4509 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v12_0_ring_preempt_ib()
[all …]
H A Dgfx_v11_0.c453 adev->gfx.kiq[0].pmf = &gfx_v11_0_kiq_pm4_funcs; in gfx_v11_0_set_kiq_pm4_funcs()
3981 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_cp_set_doorbell_range()
4342 (adev->doorbell_index.kiq * 2) << 2); in gfx_v11_0_kiq_init_register()
4381 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
4404 if (adev->gfx.kiq[0].mqd_backup) in gfx_v11_0_kiq_init_queue()
5985 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v11_0_ring_preempt_ib() local
5986 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v11_0_ring_preempt_ib()
5992 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v11_0_ring_preempt_ib()
5995 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v11_0_ring_preempt_ib()
5998 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v11_0_ring_preempt_ib()
[all …]
H A Dgfx_v8_0.c2067 amdgpu_gfx_kiq_free_ring(&adev->gfx.kiq[0].ring); in gfx_v8_0_sw_fini()
4308 adev->gfx.kiq[0].ring.sched.ready = false; in gfx_v8_0_cp_compute_enable()
4614 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4638 if (adev->gfx.kiq[0].mqd_backup) in gfx_v8_0_kiq_init_queue()
4686 gfx_v8_0_kiq_init_queue(&adev->gfx.kiq[0].ring); in gfx_v8_0_kiq_resume()
4718 ring = &adev->gfx.kiq[0].ring; in gfx_v8_0_cp_test_all_rings()
6875 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v8_0_reset_kgq() local
6876 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v8_0_reset_kgq()
6884 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v8_0_reset_kgq()
6887 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v8_0_reset_kgq()
[all …]
H A Damdgpu_amdkfd_gfx_v10.c294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[0].ring; in kgd_hiq_mqd_load()
309 spin_lock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
336 spin_unlock(&adev->gfx.kiq[0].ring_lock); in kgd_hiq_mqd_load()
H A Damdgpu_amdkfd_gfx_v9.c305 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq[inst].ring; in kgd_gfx_v9_hiq_mqd_load()
320 spin_lock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
347 spin_unlock(&adev->gfx.kiq[inst].ring_lock); in kgd_gfx_v9_hiq_mqd_load()
H A Dgfx_v7_0.c4960 struct amdgpu_kiq *kiq = &adev->gfx.kiq[0]; in gfx_v7_0_reset_kgq() local
4961 struct amdgpu_ring *kiq_ring = &kiq->ring; in gfx_v7_0_reset_kgq()
4969 if (!kiq->pmf || !kiq->pmf->kiq_unmap_queues) in gfx_v7_0_reset_kgq()
4972 spin_lock_irqsave(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
4975 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
4983 spin_unlock_irqrestore(&kiq->ring_lock, flags); in gfx_v7_0_reset_kgq()
H A Dsoc24.c297 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc24_init_doorbell_index()
H A Damdgpu_gfx.h371 struct amdgpu_kiq kiq[AMDGPU_MAX_GC_INSTANCES]; member
H A Dgmc_v12_0.c305 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v12_0_flush_gpu_tlb()
H A Dgmc_v11_0.c237 if ((adev->gfx.kiq[0].ring.sched.ready || adev->mes.ring[0].sched.ready) && in gmc_v11_0_flush_gpu_tlb()
H A Dgmc_v10_0.c276 if (adev->gfx.kiq[0].ring.sched.ready && !adev->enable_mes && in gmc_v10_0_flush_gpu_tlb()
H A Dsoc21.c482 adev->doorbell_index.kiq = AMDGPU_NAVI10_DOORBELL_KIQ; in soc21_init_doorbell_index()

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