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Searched refs:ivpu_err (Results 1 – 13 of 13) sorted by relevance

/linux-6.15/drivers/accel/ivpu/
H A Divpu_hw_btrs.c139 ivpu_err(vdev, "Fuse: invalid (0x%x)\n", fuse); in read_tile_config_fuse()
348 ivpu_err(vdev, "Timed out waiting for PLL lock\n"); in ivpu_hw_btrs_wp_drive()
430 ivpu_err(vdev, "Failed to enable D0i3: %d\n", ret); in ivpu_hw_btrs_d0i3_enable()
446 ivpu_err(vdev, "Failed to disable D0i3: %d\n", ret); in ivpu_hw_btrs_d0i3_disable()
472 ivpu_err(vdev, "Timed out waiting for TRIGGER bit\n"); in ip_reset_mtl()
496 ivpu_err(vdev, "Wait for *_TRIGGER timed out\n"); in ip_reset_lnl()
708 ivpu_err(vdev, "IMR_ERR_CFI0 LOW: 0x%08x HIGH: 0x%08x", in ivpu_hw_btrs_irq_handler_lnl()
716 ivpu_err(vdev, "IMR_ERR_CFI1 LOW: 0x%08x HIGH: 0x%08x", in ivpu_hw_btrs_irq_handler_lnl()
864 ivpu_err(vdev, "IMR_ERR_CFI0 LOW: 0x%08x HIGH: 0x%08x\n", in diagnose_failure_lnl()
869 ivpu_err(vdev, "IMR_ERR_CFI1 LOW: 0x%08x HIGH: 0x%08x\n", in diagnose_failure_lnl()
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H A Divpu_pm.c71 ivpu_err(vdev, "Failed to shutdown NPU: %d\n", ret); in ivpu_suspend()
86 ivpu_err(vdev, "Failed to power up HW: %d\n", ret); in ivpu_resume()
92 ivpu_err(vdev, "Failed to resume MMU: %d\n", ret); in ivpu_resume()
112 ivpu_err(vdev, "Failed to resume the FW: %d\n", ret); in ivpu_resume()
137 ivpu_err(vdev, "Failed to resume NPU: %d\n", ret); in ivpu_pm_reset_complete()
173 ivpu_err(vdev, "Recovery triggered by %s\n", reason); in ivpu_pm_trigger_recovery()
249 ivpu_err(vdev, "Failed to resume: %d\n", ret); in ivpu_pm_resume_cb()
274 ivpu_err(vdev, "NPU is not idle before autosuspend\n"); in ivpu_pm_runtime_suspend_cb()
282 ivpu_err(vdev, "Failed to suspend NPU: %d\n", ret); in ivpu_pm_runtime_suspend_cb()
310 ivpu_err(vdev, "Failed to set RESUME state: %d\n", ret); in ivpu_pm_runtime_resume_cb()
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H A Divpu_hw.c54 ivpu_err(vdev, "Invalid platform type: %d\n", platform); in platform_init()
188 ivpu_err(vdev, "Failed to enable workpoint: %d\n", ret); in ivpu_hw_power_up()
201 ivpu_err(vdev, "Failed to configure host SS: %d\n", ret); in ivpu_hw_power_up()
215 ivpu_err(vdev, "Failed to enable power domain: %d\n", ret); in ivpu_hw_power_up()
221 ivpu_err(vdev, "Failed to enable AXI: %d\n", ret); in ivpu_hw_power_up()
230 ivpu_err(vdev, "Failed to enable TOP NOC: %d\n", ret); in ivpu_hw_power_up()
246 ivpu_err(vdev, "Failed to reset NPU IP\n"); in ivpu_hw_reset()
251 ivpu_err(vdev, "Failed to disable workpoint\n"); in ivpu_hw_reset()
268 ivpu_err(vdev, "Failed to reset NPU\n"); in ivpu_hw_power_down()
273 ivpu_err(vdev, "Failed to enter D0I3\n"); in ivpu_hw_power_down()
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H A Divpu_fw.c94 ivpu_err(vdev, "Failed to request firmware: %d\n", ret); in ivpu_fw_request()
161 ivpu_err(vdev, "Firmware file is too small: %zu\n", fw->file->size); in ivpu_fw_parse()
176 ivpu_err(vdev, "Invalid firmware runtime address: 0x%llx\n", runtime_addr); in ivpu_fw_parse()
181 ivpu_err(vdev, "Invalid firmware runtime size: %llu\n", runtime_size); in ivpu_fw_parse()
186 ivpu_err(vdev, "Invalid image size: %llu\n", image_size); in ivpu_fw_parse()
204 ivpu_err(vdev, "Invalid entry point: 0x%llx\n", fw_hdr->entry_point); in ivpu_fw_parse()
325 ivpu_err(vdev, "Failed to create firmware runtime memory buffer\n"); in ivpu_fw_mem_init()
332 ivpu_err(vdev, "Failed to set firmware image read-only\n"); in ivpu_fw_mem_init()
339 ivpu_err(vdev, "Failed to create critical log buffer\n"); in ivpu_fw_mem_init()
352 ivpu_err(vdev, "Failed to create verbose log buffer\n"); in ivpu_fw_mem_init()
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H A Divpu_hw_ip.c211 ivpu_err(vdev, "Failed qreqn check: %d\n", ret); in ivpu_hw_ip_host_ss_configure()
217 ivpu_err(vdev, "Failed qacceptn check: %d\n", ret); in ivpu_hw_ip_host_ss_configure()
223 ivpu_err(vdev, "Failed qdeny check %d\n", ret); in ivpu_hw_ip_host_ss_configure()
695 ivpu_err(vdev, "Unknown device ID\n"); in pwr_island_delay_set()
884 ivpu_err(vdev, "Failed qdeny check: %d\n", ret); in soc_cpu_drive_40xx()
1021 ivpu_err(vdev, "WDT MSS timeout detected\n"); in diagnose_failure_37xx()
1024 ivpu_err(vdev, "WDT NCE timeout detected\n"); in diagnose_failure_37xx()
1027 ivpu_err(vdev, "NOC Firewall irq detected\n"); in diagnose_failure_37xx()
1038 ivpu_err(vdev, "WDT MSS timeout detected\n"); in diagnose_failure_40xx()
1041 ivpu_err(vdev, "WDT NCE timeout detected\n"); in diagnose_failure_40xx()
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H A Divpu_drv.c254 ivpu_err(vdev, "Failed to allocate context id: %d\n", ret); in ivpu_open()
340 ivpu_err(vdev, "Invalid NPU ready message: 0x%x\n", in ivpu_wait_for_ready()
358 ivpu_err(vdev, "Failed to enable hw scheduler: %d", ret); in ivpu_hw_sched_init()
382 ivpu_err(vdev, "Failed to start the firmware: %d\n", ret); in ivpu_boot()
388 ivpu_err(vdev, "Failed to boot the firmware: %d\n", ret); in ivpu_boot()
478 ivpu_err(vdev, "Failed to allocate a MSI IRQ: %d\n", ret); in ivpu_irq_init()
493 ivpu_err(vdev, "Failed to request an IRQ %d\n", ret); in ivpu_irq_init()
508 ivpu_err(vdev, "Failed to map bar 0: %pe\n", vdev->regv); in ivpu_pci_init()
515 ivpu_err(vdev, "Failed to map bar 4: %pe\n", vdev->regb); in ivpu_pci_init()
521 ivpu_err(vdev, "Failed to set DMA mask: %d\n", ret); in ivpu_pci_init()
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H A Divpu_drv.h81 #define ivpu_err(vdev, fmt, ...) \ macro
245 ivpu_err(vdev, "Unknown NPU IP generation\n"); in ivpu_hw_ip_gen()
261 ivpu_err(vdev, "Unknown buttress generation\n"); in ivpu_hw_btrs_gen()
H A Divpu_job.c47 ivpu_err(vdev, "Failed to create primary preemption buffer\n"); in ivpu_preemption_buffers_create()
54 ivpu_err(vdev, "Failed to create secondary preemption buffer\n"); in ivpu_preemption_buffers_create()
121 ivpu_err(vdev, "Failed to allocate command queue\n"); in ivpu_cmdq_create()
131 ivpu_err(vdev, "Failed to allocate command queue ID: %d\n", ret); in ivpu_cmdq_create()
171 ivpu_err(vdev, "Failed to allocate doorbell ID: %d\n", ret); in ivpu_register_db()
635 ivpu_err(vdev, "Failed to register command queue: %d\n", ret); in ivpu_job_submit()
785 ivpu_err(vdev, "Failed to create job\n"); in ivpu_submit()
792 ivpu_err(vdev, "Failed to prepare job: %d\n", ret); in ivpu_submit()
950 ivpu_err(vdev, "IPC message has no JSM payload\n"); in ivpu_job_done_callback()
955 ivpu_err(vdev, "Invalid JSM message result: %d\n", jsm_msg->result); in ivpu_job_done_callback()
H A Divpu_ipc.c283 ivpu_err(vdev, "IPC resp result error: %d\n", rx_msg->jsm_msg->result); in ivpu_ipc_receive()
492 ivpu_err(vdev, "Failed to allocate mem_tx\n"); in ivpu_ipc_init()
498 ivpu_err(vdev, "Failed to allocate mem_rx\n"); in ivpu_ipc_init()
507 ivpu_err(vdev, "Failed to create gen pool, %pe\n", ipc->mm_tx); in ivpu_ipc_init()
513 ivpu_err(vdev, "gen_pool_add failed, ret %d\n", ret); in ivpu_ipc_init()
522 ivpu_err(vdev, "Failed to initialize ipc->lock, ret %d\n", ret); in ivpu_ipc_init()
H A Divpu_mmu.c414 ivpu_err(vdev, "Failed to allocate cdtab: %d\n", ret); in ivpu_mmu_structs_alloc()
420 ivpu_err(vdev, "Failed to allocate strtab: %d\n", ret); in ivpu_mmu_structs_alloc()
426 ivpu_err(vdev, "Failed to allocate cmdq: %d\n", ret); in ivpu_mmu_structs_alloc()
432 ivpu_err(vdev, "Failed to allocate evtq: %d\n", ret); in ivpu_mmu_structs_alloc()
497 ivpu_err(vdev, "Failed to write MMU CMD %s\n", name); in ivpu_mmu_cmdq_cmd_write()
533 ivpu_err(vdev, "Timed out waiting for MMU consumer: %d, error: %s\n", ret, in ivpu_mmu_cmdq_sync()
786 ivpu_err(vdev, "Failed to initialize strtab: %d\n", ret); in ivpu_mmu_init()
792 ivpu_err(vdev, "Failed to resume MMU: %d\n", ret); in ivpu_mmu_init()
812 ivpu_err(vdev, "Failed to reset MMU: %d\n", ret); in ivpu_mmu_enable()
H A Divpu_gem.c58 ivpu_err(vdev, "Failed to map BO in IOMMU: %d\n", ret); in ivpu_bo_pin()
65 ivpu_err(vdev, "Failed to map BO in MMU: %d\n", ret); in ivpu_bo_pin()
94 ivpu_err(vdev, "Failed to add BO to context %u: %d\n", ctx->id, ret); in ivpu_bo_alloc_vpu_addr()
319 ivpu_err(vdev, "Failed to allocate BO: %pe (ctx %u size %llu flags 0x%x)", in ivpu_bo_create_ioctl()
350 ivpu_err(vdev, "Failed to allocate BO: %pe (vpu_addr 0x%llx size %llu flags 0x%x)", in ivpu_bo_create()
H A Divpu_mmu_context.c417 ivpu_err(vdev, "Failed to invalidate TLB for ctx %u: %d\n", ctx->id, ret); in ivpu_mmu_context_set_pages_ro()
465 ivpu_err(vdev, "Failed to map context pages\n"); in ivpu_mmu_context_map_sgt()
474 ivpu_err(vdev, "Failed to set context descriptor for context %u: %d\n", in ivpu_mmu_context_map_sgt()
486 ivpu_err(vdev, "Failed to invalidate TLB for ctx %u: %d\n", ctx->id, ret); in ivpu_mmu_context_map_sgt()
613 ivpu_err(vdev, "Failed to allocate root page table for reserved context\n"); in ivpu_mmu_reserved_context_init()
620 ivpu_err(vdev, "Failed to set context descriptor for reserved context\n"); in ivpu_mmu_reserved_context_init()
H A Divpu_ms.c55 ivpu_err(vdev, "Instance already exists (mask %#llx)\n", args->metric_group_mask); in ivpu_ms_start_ioctl()
77 ivpu_err(vdev, "Failed to allocate MS buffer (size %llu)\n", single_buff_size); in ivpu_ms_start_ioctl()
178 ivpu_err(vdev, "Instance doesn't exist for mask: %#llx\n", args->metric_group_mask); in ivpu_ms_get_data_ioctl()