Searched refs:is_cxl_root (Results 1 – 7 of 7) sorted by relevance
552 if (is_cxl_root(port)) in cxl_port_release()611 if (is_cxl_root(port)) in unregister_port()972 if (is_cxl_root(port)) in cxl_port_to_pci_bus()1014 if (is_cxl_root(port)) in dev_is_cxl_root_child()1092 if (is_cxl_root(port)) in cond_cxl_root_lock()1098 if (is_cxl_root(port)) in cond_cxl_root_unlock()1131 if (is_cxl_root(port)) in __devm_cxl_add_dport()1397 if (is_cxl_root(port)) in endpoint_host()1817 if (!is_cxl_root(port)) in cxl_root_decoder_alloc()2197 bool is_cxl_root; in cxl_endpoint_get_perf_coordinates() local[all …]
267 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_decode_reset()321 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_decode_commit()1355 } while (!is_cxl_root(iter)); in cxl_port_setup_targets()1369 if (is_cxl_root(parent_port)) { in cxl_port_setup_targets()1563 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_teardown_targets()1596 while (!is_cxl_root(to_cxl_port(iter->dev.parent))) in cxl_region_setup_targets()1689 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1699 for (iter = cxled_to_port(cxled); !is_cxl_root(iter); in cxl_region_attach_position()1865 if (is_cxl_root(iter)) in cxl_calc_interleave_pos()2104 for (iter = ep_port; !is_cxl_root(iter); in cxl_region_detach()
661 *gp_is_root = is_cxl_root(gp_port); in cxl_endpoint_gather_bandwidth()784 if (is_cxl_root(gp_port)) { in DEFINE_FREE()
422 while (!is_cxl_root(root) && is_cxl_port(root->dev.parent)) in cxl_hdm_decode_init()424 if (!is_cxl_root(root)) { in cxl_hdm_decode_init()
59 for (iter = parent_port, down = NULL; !is_cxl_root(iter); in devm_cxl_add_endpoint()
719 static inline bool is_cxl_root(struct cxl_port *port) in is_cxl_root() function
859 else if (is_cxl_root(parent_port)) in mock_cxl_enumerate_decoders()