Searched refs:irq_handler_offset (Results 1 – 2 of 2) sorted by relevance
| /linux-6.15/drivers/accel/habanalabs/gaudi/ |
| H A D | gaudi.c | 2553 u32 dma_qm_err_cfg, irq_handler_offset; in gaudi_init_pci_dma_qman() local
2642 u32 irq_handler_offset; in gaudi_init_dma_core() local
2732 u32 dma_qm_err_cfg, irq_handler_offset; in gaudi_init_hbm_dma_qman() local
2874 u32 irq_handler_offset; in gaudi_init_mme_qman() local
3000 u32 tpc_qm_err_cfg, irq_handler_offset; in gaudi_init_tpc_qman() local
3151 u32 nic_qm_err_cfg, irq_handler_offset; in gaudi_init_nic_qman() local
3820 u32 status, irq_handler_offset; in gaudi_init_cpu_queues() local
3860 WREG32(irq_handler_offset, in gaudi_init_cpu_queues()
4051 WREG32(irq_handler_offset, in gaudi_hw_fini()
4516 WREG32(irq_handler_offset, in gaudi_ring_doorbell()
[all …]
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| /linux-6.15/drivers/accel/habanalabs/gaudi2/ |
| H A D | gaudi2.c | 5145 u32 glbl_prot = QMAN_MAKE_TRUSTED, irq_handler_offset; in gaudi2_init_qman_common() local
5150 irq_handler_offset = gaudi2_get_dyn_sp_reg(hdev, queue_id_base); in gaudi2_init_qman_common()
5151 WREG32(reg_base + QM_GLBL_ERR_ADDR_LO_OFFSET, lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_qman_common()
5152 WREG32(reg_base + QM_GLBL_ERR_ADDR_HI_OFFSET, upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_qman_common()
5195 u32 prot, irq_handler_offset; in gaudi2_init_dma_core() local
5206 irq_handler_offset = le32_to_cpu(dyn_regs->gic_dma_core_irq_ctrl); in gaudi2_init_dma_core()
5209 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_dma_core()
5212 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi2_init_dma_core()
11280 u32 irq_handler_offset = le32_to_cpu(dyn_regs->gic_host_ints_irq); in gaudi2_enable_events_from_fw() local
11283 WREG32(irq_handler_offset, in gaudi2_enable_events_from_fw()
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