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Searched refs:invlpg (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/Documentation/arch/x86/
H A Dtlb.rst14 2. Use the invlpg instruction to invalidate a single page at a
42 invlpg instruction (or instructions _near_ it) show up high in
57 You might see invlpg inside of flush_tlb_mm_range() show up in
61 Essentially, you are balancing the cycles you spend doing invlpg
/linux-6.15/arch/x86/include/asm/
H A Dtlb.h26 static inline void invlpg(unsigned long addr) in invlpg() function
H A Dkvm_host.h1607 u64 invlpg; member
/linux-6.15/Documentation/virt/kvm/x86/
H A Dmmu.rst109 - invlpg/invlpga instruction execution
262 are synchronized when the guest executes invlpg or flushes its tlb by
300 and page invalidations (invlpg).
307 guest cr3. In this case, the guest is obliged to issue an invlpg instruction
310 We synchronize modified gptes when the guest invokes invlpg. This reduces
376 invlpg handling:
/linux-6.15/arch/x86/kernel/cpu/microcode/
H A Damd.c615 invlpg(p_addr); in __apply_microcode_amd()
622 invlpg(p_addr_end); in __apply_microcode_amd()
/linux-6.15/arch/x86/kvm/
H A Dkvm_emulate.h191 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); member
H A Demulate.c3426 ctxt->ops->invlpg(ctxt, linear); in em_invlpg()
4093 II(SrcMem | ByteOp | Priv | NoAccess, em_invlpg, invlpg),
H A Dx86.c266 STATS_DESC_COUNTER(VCPU, invlpg),
8623 .invlpg = emulator_invlpg,
/linux-6.15/arch/x86/mm/
H A Dtlb.c1538 invlpg(addr); in native_flush_tlb_one_user()
/linux-6.15/arch/x86/kvm/mmu/
H A Dmmu.c6400 ++vcpu->stat.invlpg; in kvm_mmu_invlpg()
6422 ++vcpu->stat.invlpg; in kvm_mmu_invpcid_gva()