Searched refs:interim_ddb (Results 1 – 2 of 2) sorted by relevance
805 u16 *min_ddb, u16 *interim_ddb) in skl_ddb_get_hw_plane_state() argument824 *interim_ddb = REG_FIELD_GET(PLANE_INTERIM_DBUF_BLOCKS_MASK, val); in skl_ddb_get_hw_plane_state()837 u16 *min_ddb, u16 *interim_ddb) in skl_pipe_ddb_get_hw_state() argument857 &interim_ddb[plane_id]); in skl_pipe_ddb_get_hw_state()1640 u16 *interim_ddb = in skl_crtc_allocate_plane_ddb() local1661 *interim_ddb = wm->sagv.wm0.min_ddb_alloc; in skl_crtc_allocate_plane_ddb()1706 u16 *interim_ddb = in skl_crtc_allocate_plane_ddb() local1722 *interim_ddb = wm->sagv.wm0.min_ddb_alloc; in skl_crtc_allocate_plane_ddb()3190 u16 *interim_ddb = in skl_wm_get_hw_state() local3198 min_ddb, interim_ddb); in skl_wm_get_hw_state()[all …]
794 const u16 *interim_ddb) in xe3_plane_min_ddb_reg_val() argument801 if (*interim_ddb) in xe3_plane_min_ddb_reg_val()802 val |= PLANE_INTERIM_DBUF_BLOCKS(*interim_ddb); in xe3_plane_min_ddb_reg_val()839 const u16 *interim_ddb = in skl_write_plane_wm() local868 xe3_plane_min_ddb_reg_val(min_ddb, interim_ddb)); in skl_write_plane_wm()