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Searched refs:intel_dp_is_uhbr (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c448 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_get_lane_adjust_train()
487 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_get_adjust_train()
599 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_set_signal_levels()
689 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_link_max_vswing_reached()
817 if (intel_dp_is_uhbr(crtc_state)) { in intel_dp_adjust_request_changed()
861 intel_dp_is_uhbr(crtc_state)); in intel_dp_link_training_clock_recovery()
950 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_training_pattern()
1012 intel_dp_is_uhbr(crtc_state)); in intel_dp_link_training_channel_equalization()
1119 if (intel_dp_is_uhbr(crtc_state) && in intel_dp_stop_link_train()
1613 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_start_link_train()
[all …]
H A Dintel_dp_mst.c114 if (!intel_dp_is_uhbr(crtc_state) || DISPLAY_VER(display) >= 20 || !dsc) in intel_dp_mst_max_dpt_bpp()
150 flags |= intel_dp_is_uhbr(crtc_state) ? DRM_DP_BW_OVERHEAD_UHBR : 0; in intel_dp_mst_bw_overhead()
219 int symbol_size = intel_dp_is_uhbr(crtc_state) ? 32 : 8; in intel_dp_mst_compute_min_hblank()
268 crtc_state->fec_enable = !intel_dp_is_uhbr(crtc_state); in intel_dp_mtp_tu_compute_config()
484 u8 link_coding_cap = intel_dp_is_uhbr(crtc_state) ? in mst_stream_update_slots()
1250 if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state)) in enable_bs_jitter_was()
1255 if (intel_dp_is_uhbr(crtc_state)) in enable_bs_jitter_was()
1260 if (crtc_state->fec_enable || intel_dp_is_uhbr(crtc_state)) in enable_bs_jitter_was()
1288 if (intel_dp_is_uhbr(pipe_config)) { in mst_stream_enable()
1313 if (intel_dp_is_uhbr(pipe_config)) in mst_stream_enable()
H A Dintel_ddi.c363 if (intel_dp_is_uhbr(crtc_state)) in intel_ddi_init_dp_buf_reg()
494 if (enable && intel_dp_is_uhbr(crtc_state)) in intel_ddi_config_transcoder_dp2()
587 intel_dp_is_uhbr(crtc_state)) { in intel_ddi_transcoder_func_reg_val_get()
588 if (intel_dp_is_uhbr(crtc_state)) in intel_ddi_transcoder_func_reg_val_get()
1479 if (intel_dp_is_uhbr(crtc_state)) { in intel_ddi_dp_level()
2587 if (intel_dp_is_uhbr(crtc_state)) in mtl_port_buf_ctl_program()
2719 if (!is_mst && intel_dp_is_uhbr(crtc_state)) { in mtl_ddi_pre_enable_dp()
2867 if (!is_mst && intel_dp_is_uhbr(crtc_state)) { in tgl_ddi_pre_enable_dp()
3513 if (!is_hdmi && intel_dp_is_uhbr(crtc_state)) { in intel_ddi_enable()
3735 intel_dp_is_uhbr(crtc_state)) { in mtl_ddi_prepare_link_retrain()
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H A Dintel_dp.h85 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
H A Dintel_ddi_buf_trans.c1683 intel_dp_is_uhbr(crtc_state)) in dg2_get_snps_buf_trans()
1702 if (intel_crtc_has_dp_encoder(crtc_state) && intel_dp_is_uhbr(crtc_state)) in mtl_get_c20_buf_trans()
H A Dintel_dp.c144 bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state) in intel_dp_is_uhbr() function
2343 if (intel_dp_is_uhbr(crtc_state)) in intel_dp_fec_compute_config()
2652 if (!ret && intel_dp_is_uhbr(pipe_config)) in intel_dp_compute_link_config()
3074 intel_dp_is_uhbr(pipe_config); in intel_dp_audio_compute_config()
3160 if (intel_dp_is_uhbr(pipe_config)) { in intel_dp_compute_config()
3197 if (!intel_dp_is_uhbr(pipe_config)) { in intel_dp_compute_config()
H A Dintel_psr.c1617 if (intel_dp_is_uhbr(crtc_state)) { in _panel_replay_compute_config()
2580 hactive_limit = intel_dp_is_uhbr(crtc_state) ? 1230 : 546; in intel_psr_apply_pr_link_on_su_wa()
2582 hactive_limit = intel_dp_is_uhbr(crtc_state) ? 615 : 273; in intel_psr_apply_pr_link_on_su_wa()