Searched refs:intel_dkl_phy_read (Results 1 – 5 of 5) sorted by relevance
| /linux-6.15/drivers/gpu/drm/i915/display/ |
| H A D | intel_dkl_phy.h | 17 intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg);
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| H A D | intel_dkl_phy.c | 44 intel_dkl_phy_read(struct intel_display *display, struct intel_dkl_phy_reg reg) in intel_dkl_phy_read() function
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| H A D | intel_dpll_mgr.c | 3634 hw_state->mg_refclkin_ctl = intel_dkl_phy_read(display, in dkl_pll_get_hw_state() 3639 intel_dkl_phy_read(display, DKL_CLKTOP2_HSCLKCTL(tc_port)); in dkl_pll_get_hw_state() 3647 intel_dkl_phy_read(display, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_get_hw_state() 3672 intel_dkl_phy_read(display, DKL_PLL_TDC_COLDST_BIAS(tc_port)); in dkl_pll_get_hw_state() 3856 val = intel_dkl_phy_read(display, DKL_REFCLKIN_CTL(tc_port)); in dkl_pll_write() 3861 val = intel_dkl_phy_read(display, DKL_CLKTOP2_CORECLKCTL1(tc_port)); in dkl_pll_write() 3866 val = intel_dkl_phy_read(display, DKL_CLKTOP2_HSCLKCTL(tc_port)); in dkl_pll_write() 3880 val = intel_dkl_phy_read(display, DKL_PLL_DIV1(tc_port)); in dkl_pll_write() 3886 val = intel_dkl_phy_read(display, DKL_PLL_SSC(tc_port)); in dkl_pll_write() 3894 val = intel_dkl_phy_read(display, DKL_PLL_BIAS(tc_port)); in dkl_pll_write() [all …]
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| H A D | intel_ddi.c | 2149 if (ln0 != intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 0))) in tgl_dkl_phy_check_and_rewrite() 2151 if (ln1 != intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 1))) in tgl_dkl_phy_check_and_rewrite() 2172 ln0 = intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 0)); in icl_program_mg_dp_mode() 2173 ln1 = intel_dkl_phy_read(display, DKL_DP_MODE(tc_port, 1)); in icl_program_mg_dp_mode()
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| H A D | intel_display_power_well.c | 541 if (wait_for(intel_dkl_phy_read(display, DKL_CMN_UC_DW_27(tc_port)) & in icl_tc_phy_aux_power_well_enable()
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