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Searched refs:intel_de_wait_for_set (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c95 if (intel_de_wait_for_set(display, MIPI_GEN_FIFO_STAT(display, port), in vlv_dsi_wait_for_fifo_empty()
189 if (intel_de_wait_for_set(display, MIPI_INTR_STAT(display, port), in intel_dsi_host_transfer()
247 if (intel_de_wait_for_set(display, MIPI_INTR_STAT(display, port), mask, 100)) in dpi_send_cmd()
353 if (intel_de_wait_for_set(display, MIPI_CTRL(display, port), in glk_dsi_enable_io()
375 if (intel_de_wait_for_set(display, MIPI_CTRL(display, port), in glk_dsi_device_ready()
414 if (intel_de_wait_for_set(display, MIPI_CTRL(display, port), in glk_dsi_device_ready()
422 if (intel_de_wait_for_set(display, BXT_MIPI_PORT_CTRL(port), in glk_dsi_device_ready()
H A Dintel_de.h189 #define intel_de_wait_for_set(p,...) __intel_de_wait_for_set(__to_intel_display(p), __VA_ARGS__) macro
H A Dintel_pch_display.c312 if (intel_de_wait_for_set(display, reg, TRANS_STATE_ENABLE, 100)) in ilk_enable_pch_transcoder()
580 if (intel_de_wait_for_set(dev_priv, LPT_TRANSCONF, in lpt_enable_pch_transcoder()
H A Dhsw_ips.c58 if (intel_de_wait_for_set(display, IPS_CTL, IPS_ENABLE, 50)) in hsw_ips_enable()
H A Dintel_display_power_well.c281 if (intel_de_wait_for_set(display, regs->driver, in hsw_wait_for_power_well_enable()
341 intel_de_wait_for_set(display, SKL_FUSE_STATUS, in gen9_wait_for_power_well_fuses()
1453 if (intel_de_wait_for_set(display, DISPLAY_PHY_STATUS, in chv_dpio_cmn_power_well_enable()
1876 if (intel_de_wait_for_set(display, XE2LPD_PICA_PW_CTL, in xe2lpd_pica_power_well_enable()
H A Dintel_hdcp.c428 if (intel_de_wait_for_set(display, HDCP_REP_CTL, HDCP_SHA1_READY, 1)) { in intel_write_sha_text()
707 if (intel_de_wait_for_set(display, HDCP_REP_CTL, in intel_hdcp_validate_v_prime()
855 if (intel_de_wait_for_set(display, in intel_hdcp_auth()
950 if (intel_de_wait_for_set(display, in intel_hdcp_auth()
1938 ret = intel_de_wait_for_set(display, in hdcp2_enable_encryption()
H A Dvlv_dsi_pll.c561 if (intel_de_wait_for_set(dev_priv, BXT_DSI_PLL_ENABLE, in bxt_dsi_pll_enable()
H A Dintel_cdclk.c1081 if (intel_de_wait_for_set(display, LCPLL1_CTL, LCPLL_PLL_LOCK, 5)) in skl_dpll0_enable()
1785 if (intel_de_wait_for_set(display, in bxt_de_pll_enable()
1816 if (intel_de_wait_for_set(display, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1)) in icl_cdclk_pll_enable()
1836 if (intel_de_wait_for_set(display, BXT_DE_PLL_ENABLE, in adlp_cdclk_pll_crawl()
H A Dintel_lvds.c334 if (intel_de_wait_for_set(dev_priv, PP_STATUS(dev_priv, 0), PP_ON, 5000)) in intel_enable_lvds()
H A Dintel_dpio_phy.c393 if (intel_de_wait_for_set(display, BXT_PORT_REF_DW3(phy), GRC_DONE, 10)) in bxt_phy_wait_grc_done()
H A Dintel_ddi.c207 if (intel_de_wait_for_set(display, intel_ddi_buf_status_reg(display, port), in intel_wait_ddi_buf_idle()
2293 if (intel_de_wait_for_set(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_act_sent()
2379 ret = intel_de_wait_for_set(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_fec_status()
3847 if (intel_de_wait_for_set(dev_priv, in intel_ddi_set_idle_link_train()
H A Dintel_dpll.c2015 if (intel_de_wait_for_set(dev_priv, DPLL(dev_priv, pipe), DPLL_LOCK_VLV, 1)) in _vlv_enable_pll()
2162 if (intel_de_wait_for_set(dev_priv, DPLL(dev_priv, pipe), DPLL_LOCK_VLV, 1)) in _chv_enable_pll()
H A Dintel_dpll_mgr.c1398 if (intel_de_wait_for_set(display, DPLL_STATUS, DPLL_LOCK(id), 5)) in skl_ddi_pll_enable()
3919 if (intel_de_wait_for_set(display, enable_reg, PLL_POWER_STATE, 1)) in icl_pll_power_enable()
3931 if (intel_de_wait_for_set(display, enable_reg, PLL_LOCK, 1)) in icl_pll_enable()
H A Dintel_snps_phy.c1864 if (intel_de_wait_for_set(display, enable_reg, PLL_LOCK, 5)) in intel_mpllb_enable()
H A Dintel_display_power.c1333 if (intel_de_wait_for_set(display, LCPLL_CTL, LCPLL_PLL_LOCK, 5)) in hsw_restore_lcpll()
H A Dicl_dsi.c1029 if (intel_de_wait_for_set(display, TRANSCONF(display, dsi_trans), in gen11_dsi_enable_transcoder()