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Searched refs:intel_de_wait_for_clear (Results 1 – 22 of 22) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dvlv_dsi.c163 if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port), in intel_dsi_host_transfer()
177 if (intel_de_wait_for_clear(display, MIPI_GEN_FIFO_STAT(display, port), in intel_dsi_host_transfer()
395 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_device_ready()
521 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_enter_low_power_mode()
528 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_enter_low_power_mode()
546 if (intel_de_wait_for_clear(display, MIPI_CTRL(display, port), in glk_dsi_disable_mipi_io()
598 intel_de_wait_for_clear(display, port_ctrl, in vlv_dsi_clear_device_ready()
H A Dintel_pmdemand.c413 return !(intel_de_wait_for_clear(display, in intel_pmdemand_check_prev_transaction()
416 intel_de_wait_for_clear(display, in intel_pmdemand_check_prev_transaction()
H A Dintel_de.h197 #define intel_de_wait_for_clear(p,...) __intel_de_wait_for_clear(__to_intel_display(p), __VA_ARGS__) macro
H A Dintel_pch_display.c334 if (intel_de_wait_for_clear(dev_priv, reg, TRANS_STATE_ENABLE, 50)) in ilk_disable_pch_transcoder()
589 if (intel_de_wait_for_clear(dev_priv, LPT_TRANSCONF, in lpt_disable_pch_transcoder()
H A Dintel_crt.c506 if (intel_de_wait_for_clear(display, in ilk_crt_detect_hotplug()
563 if (intel_de_wait_for_clear(display, crt->adpa_reg, in valleyview_crt_detect_hotplug()
616 if (intel_de_wait_for_clear(display, PORT_HOTPLUG_EN(display), in intel_crt_detect_hotplug()
H A Dhsw_ips.c82 if (intel_de_wait_for_clear(display, IPS_CTL, IPS_ENABLE, 100)) in hsw_ips_disable()
H A Dintel_lvds.c350 if (intel_de_wait_for_clear(dev_priv, PP_STATUS(dev_priv, 0), PP_ON, 1000)) in intel_disable_lvds()
389 if (intel_de_wait_for_clear(dev_priv, PP_STATUS(dev_priv, 0), PP_CYCLE_DELAY_ACTIVE, 5000)) in intel_lvds_shutdown()
H A Dintel_cx0_phy.c144 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in intel_cx0_bus_reset()
213 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_read_once()
285 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_write_once()
301 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in __intel_cx0_write_once()
2818 if (intel_de_wait_for_clear(display, XELPDP_PORT_M2P_MSGBUS_CTL(display, port, lane), in intel_cx0_powerdown_change_sequence()
2929 if (intel_de_wait_for_clear(display, XELPDP_PORT_BUF_CTL2(display, port), in intel_cx0_phy_lane_reset()
H A Dvlv_dsi_pll.c314 if (intel_de_wait_for_clear(dev_priv, BXT_DSI_PLL_ENABLE, in bxt_dsi_pll_disable()
H A Dintel_vrr.c495 intel_de_wait_for_clear(display, in intel_vrr_disable()
H A Dintel_psr.c2099 if (intel_de_wait_for_clear(display, psr_status, in intel_psr_wait_exit_locked()
2912 return intel_de_wait_for_clear(display, in _psr2_ready_for_pipe_update_locked()
2928 return intel_de_wait_for_clear(display, in _psr1_ready_for_pipe_update_locked()
2991 err = intel_de_wait_for_clear(display, reg, mask, 50); in __psr_wait_for_idle_locked()
H A Dintel_tc.c1029 if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD, in xelpdp_tc_power_request_wa()
1042 if (intel_de_wait_for_clear(display, TCSS_DISP_MAILBOX_IN_CMD, in xelpdp_tc_power_request_wa()
H A Dintel_snps_phy.c43 if (intel_de_wait_for_clear(display, DG2_PHY_MISC(phy), in intel_snps_phy_wait_for_calibration()
1904 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 5)) in intel_mpllb_disable()
H A Dintel_cdclk.c1095 if (intel_de_wait_for_clear(display, LCPLL1_CTL, LCPLL_PLL_LOCK, 1)) in skl_dpll0_disable()
1768 if (intel_de_wait_for_clear(display, in bxt_de_pll_disable()
1798 if (intel_de_wait_for_clear(display, BXT_DE_PLL_ENABLE, BXT_DE_PLL_LOCK, 1)) in icl_cdclk_pll_disable()
H A Dintel_hdcp.c1010 if (intel_de_wait_for_clear(display, in _intel_hdcp_disable()
1964 ret = intel_de_wait_for_clear(display, in hdcp2_disable_encryption()
H A Dintel_display_power_well.c1889 if (intel_de_wait_for_clear(display, XE2LPD_PICA_PW_CTL, in xe2lpd_pica_power_well_disable()
H A Dintel_fbc.c325 if (intel_de_wait_for_clear(display, FBC_STATUS, in i8xx_fbc_deactivate()
H A Dintel_display_power.c1279 if (intel_de_wait_for_clear(display, LCPLL_CTL, LCPLL_PLL_LOCK, 1)) in hsw_disable_lcpll()
H A Dicl_dsi.c1296 if (intel_de_wait_for_clear(display, TRANSCONF(display, dsi_trans), in gen11_dsi_disable_transcoder()
H A Dintel_dpll_mgr.c4044 if (intel_de_wait_for_clear(display, enable_reg, PLL_LOCK, 1)) in icl_pll_disable()
4055 if (intel_de_wait_for_clear(display, enable_reg, PLL_POWER_STATE, 1)) in icl_pll_disable()
H A Dintel_ddi.c232 if (intel_de_wait_for_clear(display, intel_ddi_buf_status_reg(display, port), in intel_wait_ddi_buf_active()
2382 ret = intel_de_wait_for_clear(display, dp_tp_status_reg(encoder, crtc_state), in intel_ddi_wait_for_fec_status()
H A Dintel_display.c415 if (intel_de_wait_for_clear(display, TRANSCONF(display, cpu_transcoder), in intel_wait_for_pipe_off()