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Searched refs:input_reg (Results 1 – 16 of 16) sorted by relevance

/linux-6.15/drivers/pinctrl/freescale/
H A Dpinctrl-imx-scmi.c65 int mux_reg, conf_reg, input_reg, mux_val, conf_val, input_val; in pinctrl_scmi_imx_dt_node_to_map() local
109 input_reg = be32_to_cpu(*list++); in pinctrl_scmi_imx_dt_node_to_map()
125 if (!input_reg) { in pinctrl_scmi_imx_dt_node_to_map()
129 (input_reg - daisy_off) / 4); in pinctrl_scmi_imx_dt_node_to_map()
H A Dpinctrl-imx.c220 val = readl(ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
223 writel(val, ipctl->base + pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
224 } else if (pin_mmio->input_reg) { in imx_pmx_set_one_pin_mmio()
231 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
234 pin_mmio->input_reg); in imx_pmx_set_one_pin_mmio()
237 pin_mmio->input_reg, pin_mmio->input_val); in imx_pmx_set_one_pin_mmio()
490 pin_mmio->input_reg = be32_to_cpu(*list++); in imx_pinctrl_parse_pin_mmio()
H A Dpinctrl-imx.h31 u16 input_reg; member
/linux-6.15/Documentation/devicetree/bindings/firmware/
H A Dnxp,imx95-scmi-pinctrl.yaml29 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
42 "input_reg" indicates the offset of select input register.
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,imx8ulp-pinctrl.yaml35 setting for one pin. The first 4 integers <mux_config_reg input_reg
46 "input_reg" indicates the offset of select input register.
H A Dfsl,imxrt1050.yaml36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
49 "input_reg" indicates the offset of select input register.
H A Dfsl,imxrt1170.yaml36 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
49 "input_reg" indicates the offset of select input register.
H A Dfsl,imx8m-pinctrl.yaml39 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
53 "input_reg" indicates the offset of select input register.
H A Dfsl,imx9-pinctrl.yaml40 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
53 "input_reg" indicates the offset of select input register.
H A Dfsl,imx7d-pinctrl.yaml44 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
57 "input_reg" indicates the offset of select input register.
H A Dfsl,imx35-pinctrl.yaml52 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg
65 "input_reg" indicates the offset of select input register.
H A Dfsl,imx7ulp-pinctrl.txt17 <mux_conf_reg input_reg mux_mode input_val> are specified
H A Dfsl,imx-pinctrl.txt26 setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val
/linux-6.15/include/linux/
H A Dhid-over-i2c.h102 __le16 input_reg; member
/linux-6.15/drivers/pinctrl/mvebu/
H A Dpinctrl-armada-37xx.c1058 u32 mask, *irq_pol, input_reg, virq, type, level; in armada_3700_pinctrl_resume() local
1063 input_reg = INPUT_VAL; in armada_3700_pinctrl_resume()
1067 input_reg = INPUT_VAL + sizeof(u32); in armada_3700_pinctrl_resume()
1083 regmap_read(info->regmap, input_reg, &level); in armada_3700_pinctrl_resume()
/linux-6.15/drivers/input/touchscreen/
H A Diqs5xx.c901 bool input_reg = !iqs5xx->input; in fw_file_store() local
925 if (input_reg) { in fw_file_store()