| /linux-6.15/drivers/gpu/drm/msm/adreno/ |
| H A D | a6xx_gmu.c | 115 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_set_freq() local
162 gmu->freq = gmu->gpu_freqs[perf_index]; in a6xx_gmu_set_freq()
209 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_get_freq() local
1059 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_gmu_resume() local
1771 free_irq(gmu->gmu_irq, gmu); in a6xx_gmu_remove()
1772 free_irq(gmu->hfi_irq, gmu); in a6xx_gmu_remove()
1905 ret = a6xx_gmu_memory_alloc(gmu, &gmu->dummy, gmu->dummy.size, in a6xx_gmu_init()
1968 gmu->rscc = gmu->mmio + 0x23000; in a6xx_gmu_init()
1992 gmu->qmp = qmp_get(gmu->dev); in a6xx_gmu_init()
2031 free_irq(gmu->gmu_irq, gmu); in a6xx_gmu_init()
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| H A D | a6xx_gmu.h | 123 return readl(gmu->mmio + (offset << 2)); in gmu_read()
128 writel(value, gmu->mmio + (offset << 2)); in gmu_write()
140 u32 val = gmu_read(gmu, reg); in gmu_rmw()
144 gmu_write(gmu, reg, val | or); in gmu_rmw()
151 val = (u64) readl(gmu->mmio + (lo << 2)); in gmu_read64()
163 return readl(gmu->rscc + (offset << 2)); in gmu_read_rscc()
168 writel(value, gmu->rscc + (offset << 2)); in gmu_write_rscc()
208 void a6xx_hfi_init(struct a6xx_gmu *gmu);
210 void a6xx_hfi_stop(struct a6xx_gmu *gmu);
214 bool a6xx_gmu_gx_is_on(struct a6xx_gmu *gmu);
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| H A D | a6xx_hfi.c | 60 if (!gmu->legacy) in a6xx_hfi_queue_read()
91 if (!gmu->legacy) { in a6xx_hfi_queue_write()
115 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
134 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
150 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
157 DRM_DEV_ERROR(gmu->dev, in a6xx_hfi_wait_for_ack()
708 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_send_bw_table()
712 if (gmu->bw_table) in a6xx_hfi_send_bw_table()
744 gmu->bw_table = msg; in a6xx_hfi_send_bw_table()
747 return a6xx_hfi_send_msg(gmu, HFI_H2F_MSG_BW_TABLE, gmu->bw_table, sizeof(*(gmu->bw_table)), in a6xx_hfi_send_bw_table()
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| H A D | a6xx_gpu.c | 496 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_set_hwcg() local
1049 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in hw_init() local
1079 a6xx_sptprac_enable(gmu); in hw_init()
1395 if (a6xx_gpu->gmu.legacy) { in hw_init()
1427 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_recover() local
1470 dev_pm_genpd_add_notifier(gmu->cxpd, &gmu->pd_nb); in a6xx_recover()
2048 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_pm_resume() local
2077 a6xx_sptprac_enable(gmu); in a6xx_pm_resume()
2082 pm_runtime_put(gmu->gxpd); in a6xx_pm_resume()
2083 pm_runtime_put(gmu->dev); in a6xx_pm_resume()
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| H A D | a6xx_gpu.h | 81 struct a6xx_gmu gmu; member
243 int a6xx_gmu_wait_for_idle(struct a6xx_gmu *gmu);
245 bool a6xx_gmu_isidle(struct a6xx_gmu *gmu);
247 int a6xx_gmu_set_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
248 void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state);
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| H A D | a6xx_gpu_state.c | 155 if (!a6xx_gmu_sptprac_is_on(&a6xx_gpu->gmu)) in a6xx_crashdumper_run()
1181 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in _a6xx_get_gmu_registers() local
1201 val = gmu_read_rscc(gmu, offset); in _a6xx_get_gmu_registers()
1203 val = gmu_read(gmu, offset); in _a6xx_get_gmu_registers()
1237 if (!a6xx_gmu_gx_is_on(&a6xx_gpu->gmu)) in a6xx_get_gmu_registers()
1275 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a6xx_snapshot_gmu_hfi_history() local
1280 for (i = 0; i < ARRAY_SIZE(gmu->queues); i++) { in a6xx_snapshot_gmu_hfi_history()
1281 struct a6xx_hfi_queue *queue = &gmu->queues[i]; in a6xx_snapshot_gmu_hfi_history()
1586 a6xx_state->gmu_log = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.log); in a6xx_gpu_state_get()
1587 a6xx_state->gmu_hfi = a6xx_snapshot_gmu_bo(a6xx_state, &a6xx_gpu->gmu.hfi); in a6xx_gpu_state_get()
[all …]
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| /linux-6.15/Documentation/devicetree/bindings/display/msm/ |
| H A D | gmu.yaml | 55 - const: gmu
105 - const: gmu
116 - const: gmu
139 - const: gmu
153 - const: gmu
176 - const: gmu
196 - const: gmu
220 - const: gmu
243 - const: gmu
297 gmu: gmu@506a000 {
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| H A D | gpu.yaml | 130 qcom,gmu:
206 - const: gmu
328 qcom,gmu = <&gmu>;
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| /linux-6.15/arch/arm64/boot/dts/qcom/ |
| H A D | msm8992.dtsi | 31 gmu-sram@0 {
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| H A D | sdm670.dtsi | 1339 qcom,gmu = <&gmu>;
1446 gmu: gmu@506a000 { label
1447 compatible = "qcom,adreno-gmu-615.0", "qcom,adreno-gmu";
1452 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
1456 interrupt-names = "hfi", "gmu";
1462 clock-names = "gmu", "cxo", "axi", "memnoc";
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| H A D | sm6350.dtsi | 1362 qcom,gmu = <&gmu>;
1446 gmu: gmu@3d6a000 { label
1447 compatible = "qcom,adreno-gmu-619.0", "qcom,adreno-gmu";
1451 reg-names = "gmu",
1458 "gmu";
1466 "gmu",
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| H A D | sar2130p.dtsi | 1647 qcom,gmu = <&gmu>;
1706 gmu: gmu@3d6a000 { label
1707 compatible = "qcom,adreno-gmu-621.0", "qcom,adreno-gmu";
1711 reg-names = "gmu", "rscc", "gmu_pdc";
1715 interrupt-names = "hfi", "gmu";
1724 "gmu",
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| H A D | sc8180x.dtsi | 2277 qcom,gmu = <&gmu>;
2322 gmu: gmu@2c6a000 { label
2323 compatible = "qcom,adreno-gmu-680.1", "qcom,adreno-gmu";
2328 reg-names = "gmu",
2334 interrupt-names = "hfi", "gmu";
2341 clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
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| H A D | sm8350.dtsi | 2045 qcom,gmu = <&gmu>;
2110 gmu: gmu@3d6a000 { label
2111 compatible = "qcom,adreno-gmu-660.1", "qcom,adreno-gmu";
2116 reg-names = "gmu", "rscc", "gmu_pdc";
2120 interrupt-names = "hfi", "gmu";
2129 clock-names = "gmu",
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| H A D | qcm2290.dtsi | 1451 "gmu",
1462 qcom,gmu = <&gmu_wrapper>;
1531 gmu_wrapper: gmu@596a000 {
1532 compatible = "qcom,adreno-gmu-wrapper";
1534 reg-names = "gmu";
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| H A D | sc7180.dtsi | 2171 qcom,gmu = <&gmu>;
2265 gmu: gmu@506a000 { label
2266 compatible = "qcom,adreno-gmu-618.0", "qcom,adreno-gmu";
2269 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
2272 interrupt-names = "hfi", "gmu";
2277 clock-names = "gmu", "cxo", "axi", "memnoc";
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| H A D | sm8150-mtp.dts | 353 &gmu {
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| H A D | sm8250-hdk.dts | 368 &gmu {
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| H A D | sm8150.dtsi | 2253 qcom,gmu = <&gmu>;
2306 gmu: gmu@2c6a000 { label
2307 compatible = "qcom,adreno-gmu-640.1", "qcom,adreno-gmu";
2312 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
2316 interrupt-names = "hfi", "gmu";
2323 clock-names = "ahb", "gmu", "cxo", "axi", "memnoc";
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| H A D | sm8450.dtsi | 2369 qcom,gmu = <&gmu>;
2443 gmu: gmu@3d6a000 { label
2444 compatible = "qcom,adreno-gmu-730.1", "qcom,adreno-gmu";
2448 reg-names = "gmu", "rscc", "gmu_pdc";
2452 interrupt-names = "hfi", "gmu";
2462 "gmu",
2544 clock-names = "gmu",
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| H A D | sdm845-xiaomi-beryllium-common.dtsi | 242 &gmu {
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| H A D | sdm845.dtsi | 4852 qcom,gmu = <&gmu>;
4929 gmu: gmu@506a000 { label
4930 compatible = "qcom,adreno-gmu-630.2", "qcom,adreno-gmu";
4935 reg-names = "gmu", "gmu_pdc", "gmu_pdc_seq";
4939 interrupt-names = "hfi", "gmu";
4945 clock-names = "gmu", "cxo", "axi", "memnoc";
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| H A D | sm6115.dtsi | 1722 "gmu",
1730 qcom,gmu = <&gmu_wrapper>;
1796 gmu_wrapper: gmu@596a000 {
1797 compatible = "qcom,adreno-gmu-wrapper";
1799 reg-names = "gmu";
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| /linux-6.15/Documentation/devicetree/bindings/sram/ |
| H A D | qcom,ocmem.yaml | 120 gmu-sram@0 {
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| /linux-6.15/drivers/gpu/drm/ci/xfails/ |
| H A D | msm-sm8350-hdk-skips.txt | 29 # [ 200.950227] platform 3d6a000.gmu: [drm:a6xx_hfi_send_msg.constprop.0] *ERROR* Message HFI_H2F_…
34 # [ 204.213387] platform 3d6a000.gmu: GMU watchdog expired
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