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Searched refs:gfx_table (Results 1 – 22 of 22) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Daldebaran_ppt.c369 dpm_table = &dpm_context->dpm_tables.gfx_table; in aldebaran_set_default_dpm_table()
541 struct smu_13_0_dpm_table *gfx_table = in aldebaran_populate_umd_state_clk() local
542 &dpm_context->dpm_tables.gfx_table; in aldebaran_populate_umd_state_clk()
550 pstate_table->gfxclk_pstate.min = gfx_table->min; in aldebaran_populate_umd_state_clk()
551 pstate_table->gfxclk_pstate.peak = gfx_table->max; in aldebaran_populate_umd_state_clk()
1270 struct smu_13_0_dpm_table *gfx_table = in aldebaran_set_performance_level() local
1271 &dpm_context->dpm_tables.gfx_table; in aldebaran_set_performance_level()
1343 (max > dpm_context->dpm_tables.gfx_table.max)) { in aldebaran_set_soft_freq_limited_range()
1350 min_clk = dpm_context->dpm_tables.gfx_table.min; in aldebaran_set_soft_freq_limited_range()
1351 max_clk = dpm_context->dpm_tables.gfx_table.max; in aldebaran_set_soft_freq_limited_range()
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H A Dsmu_v13_0_6_ppt.c967 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_set_default_dpm_table()
1047 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_6_populate_umd_state_clk() local
1048 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_populate_umd_state_clk()
1055 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_6_populate_umd_state_clk()
1892 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_6_set_performance_level() local
1893 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_6_set_performance_level()
1914 smu, gfx_table->min, gfx_table->max); in smu_v13_0_6_set_performance_level()
2011 min_clk = dpm_context->dpm_tables.gfx_table.min; in smu_v13_0_6_set_soft_freq_limited_range()
2012 max_clk = dpm_context->dpm_tables.gfx_table.max; in smu_v13_0_6_set_soft_freq_limited_range()
2063 dpm_context->dpm_tables.gfx_table.min); in smu_v13_0_6_usr_edit_dpm_table()
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H A Daldebaran_ppt.h61 struct aldebaran_single_dpm_table gfx_table; member
H A Dsmu_v13_0_7_ppt.c603 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_set_default_dpm_table()
899 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_get_dpm_ultimate_freq()
1220 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_print_clk_levels()
2011 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_7_force_clk_levels()
2311 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_7_populate_umd_state_clk() local
2312 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_7_populate_umd_state_clk()
2330 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_7_populate_umd_state_clk()
2332 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v13_0_7_populate_umd_state_clk()
2335 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_7_populate_umd_state_clk()
2353 driver_clocks.BaseClockAc < gfx_table->max) in smu_v13_0_7_populate_umd_state_clk()
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H A Dsmu_v13_0_0_ppt.c596 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_set_default_dpm_table()
910 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_get_dpm_ultimate_freq()
1231 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_print_clk_levels()
2022 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v13_0_0_force_clk_levels()
2325 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_0_populate_umd_state_clk() local
2326 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_0_populate_umd_state_clk()
2344 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v13_0_0_populate_umd_state_clk()
2346 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v13_0_0_populate_umd_state_clk()
2349 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v13_0_0_populate_umd_state_clk()
2367 driver_clocks.BaseClockAc < gfx_table->max) in smu_v13_0_0_populate_umd_state_clk()
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H A Dsmu_v13_0.c1694 struct smu_13_0_dpm_table *gfx_table = in smu_v13_0_set_performance_level() local
1695 &dpm_context->dpm_tables.gfx_table; in smu_v13_0_set_performance_level()
1720 sclk_min = sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
1728 sclk_min = sclk_max = gfx_table->min; in smu_v13_0_set_performance_level()
1736 sclk_min = gfx_table->min; in smu_v13_0_set_performance_level()
1737 sclk_max = gfx_table->max; in smu_v13_0_set_performance_level()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dvega20_hwmgr.c600 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_gfxclk_dpm_table()
666 dpm_table = &(data->dpm_table.gfx_table); in vega20_setup_default_dpm_tables()
1481 &(data->dpm_table.gfx_table); in vega20_get_sclk_od()
1483 &(data->golden_dpm_table.gfx_table); in vega20_get_sclk_od()
1500 &(data->golden_dpm_table.gfx_table); in vega20_set_sclk_od()
1571 struct vega20_single_dpm_table *gfx_table = &(data->dpm_table.gfx_table); in vega20_populate_umdpstate_clocks() local
1583 hwmgr->pstate_sclk_peak = gfx_table->dpm_levels[gfx_table->count - 1].value; in vega20_populate_umdpstate_clocks()
2400 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_highest()
2442 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega20_force_dpm_lowest()
2581 data->dpm_table.gfx_table.count - 1); in vega20_force_clock_level()
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H A Dvega12_hwmgr.c667 dpm_table = &(data->dpm_table.gfx_table); in vega12_setup_default_dpm_tables()
1663 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_highest()
1664 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_highest()
1692 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_dpm_lowest()
1693 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega12_force_dpm_lowest()
1866 dpm_table = &(data->dpm_table.gfx_table); in vega12_get_sclks()
2037 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega12_force_clock_level()
2372 dpm_table = &(data->dpm_table.gfx_table); in vega12_apply_clocks_adjust_rules()
2673 for (i = 0; i < dpm_table->gfx_table.count; i++) {
2674 if (dpm_table->gfx_table.dpm_levels[i].enabled &&
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H A Dvega10_hwmgr.c1361 dpm_table = &(data->dpm_table.gfx_table); in vega10_setup_default_dpm_tables()
3579 &(data->dpm_table.gfx_table), in vega10_trim_dpm_states()
3649 data->dpm_table.gfx_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()
3655 data->dpm_table.gfx_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()
3707 data->dpm_table.gfx_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()
3712 data->dpm_table.gfx_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()
5153 &(data->golden_dpm_table.gfx_table); in vega10_get_sclk_od()
5168 &(data->golden_dpm_table.gfx_table); in vega10_set_sclk_od()
5433 golden_table = &(data->golden_dpm_table.gfx_table); in vega10_check_clk_voltage_valid()
5463 &data->dpm_table.gfx_table; in vega10_odn_update_power_state()
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H A Dvega10_hwmgr.h148 struct vega10_single_dpm_table gfx_table; member
H A Dvega12_hwmgr.h126 struct vega12_single_dpm_table gfx_table; member
H A Dvega20_hwmgr.h179 struct vega20_single_dpm_table gfx_table; member
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Darcturus_ppt.h61 struct arcturus_single_dpm_table gfx_table; member
H A Darcturus_ppt.c387 dpm_table = &dpm_context->dpm_tables.gfx_table; in arcturus_set_default_dpm_table()
575 struct smu_11_0_dpm_table *gfx_table = in arcturus_populate_umd_state_clk() local
576 &dpm_context->dpm_tables.gfx_table; in arcturus_populate_umd_state_clk()
584 pstate_table->gfxclk_pstate.min = gfx_table->min; in arcturus_populate_umd_state_clk()
585 pstate_table->gfxclk_pstate.peak = gfx_table->max; in arcturus_populate_umd_state_clk()
593 if (gfx_table->count > ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL && in arcturus_populate_umd_state_clk()
597 gfx_table->dpm_levels[ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
829 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_emit_clk_levels()
959 freq = dpm_context->dpm_tables.gfx_table.dpm_levels[level].value; in arcturus_upload_dpm_level()
1022 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in arcturus_force_clk_levels()
H A Dsmu_v11_0.c1857 struct smu_11_0_dpm_table *gfx_table = in smu_v11_0_set_performance_level() local
1858 &dpm_context->dpm_tables.gfx_table; in smu_v11_0_set_performance_level()
1874 sclk_min = sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
1879 sclk_min = sclk_max = gfx_table->min; in smu_v11_0_set_performance_level()
1884 sclk_min = gfx_table->min; in smu_v11_0_set_performance_level()
1885 sclk_max = gfx_table->max; in smu_v11_0_set_performance_level()
H A Dnavi10_ppt.c992 dpm_table = &dpm_context->dpm_tables.gfx_table; in navi10_set_default_dpm_table()
1713 struct smu_11_0_dpm_table *gfx_table = in navi10_populate_umd_state_clk() local
1714 &dpm_context->dpm_tables.gfx_table; in navi10_populate_umd_state_clk()
1724 pstate_table->gfxclk_pstate.min = gfx_table->min; in navi10_populate_umd_state_clk()
1768 sclk_freq = gfx_table->dpm_levels[gfx_table->count - 1].value; in navi10_populate_umd_state_clk()
1779 if (gfx_table->max > NAVI10_UMD_PSTATE_PROFILING_GFXCLK && in navi10_populate_umd_state_clk()
H A Dsienna_cichlid_ppt.c982 dpm_table = &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_set_default_dpm_table()
1489 struct smu_11_0_dpm_table *gfx_table = in sienna_cichlid_populate_umd_state_clk() local
1490 &dpm_context->dpm_tables.gfx_table; in sienna_cichlid_populate_umd_state_clk()
1499 pstate_table->gfxclk_pstate.min = gfx_table->min; in sienna_cichlid_populate_umd_state_clk()
1500 pstate_table->gfxclk_pstate.peak = gfx_table->max; in sienna_cichlid_populate_umd_state_clk()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_2_ppt.c526 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_set_default_dpm_table()
831 dpm_table = &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_get_dpm_ultimate_freq()
1095 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_print_clk_levels()
1420 single_dpm_table = &(dpm_context->dpm_tables.gfx_table); in smu_v14_0_2_force_clk_levels()
1577 struct smu_14_0_dpm_table *gfx_table = in smu_v14_0_2_populate_umd_state_clk() local
1578 &dpm_context->dpm_tables.gfx_table; in smu_v14_0_2_populate_umd_state_clk()
1596 pstate_table->gfxclk_pstate.min = gfx_table->min; in smu_v14_0_2_populate_umd_state_clk()
1598 (driver_clocks.GameClockAc < gfx_table->max)) in smu_v14_0_2_populate_umd_state_clk()
1601 pstate_table->gfxclk_pstate.peak = gfx_table->max; in smu_v14_0_2_populate_umd_state_clk()
1619 driver_clocks.BaseClockAc < gfx_table->max) in smu_v14_0_2_populate_umd_state_clk()
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H A Dsmu_v14_0.c1245 struct smu_14_0_dpm_table *gfx_table = in smu_v14_0_set_performance_level() local
1246 &dpm_context->dpm_tables.gfx_table; in smu_v14_0_set_performance_level()
1271 sclk_min = sclk_max = gfx_table->max; in smu_v14_0_set_performance_level()
1279 sclk_min = sclk_max = gfx_table->min; in smu_v14_0_set_performance_level()
1287 sclk_min = gfx_table->min; in smu_v14_0_set_performance_level()
1288 sclk_max = gfx_table->max; in smu_v14_0_set_performance_level()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Dsmu_v14_0.h92 struct smu_14_0_dpm_table gfx_table; member
H A Dsmu_v11_0.h103 struct smu_11_0_dpm_table gfx_table; member
H A Dsmu_v13_0.h97 struct smu_13_0_dpm_table gfx_table; member