Home
last modified time | relevance | path

Searched refs:gam_regs (Results 1 – 8 of 8) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn10/
H A Ddcn10_dpp_cm.c131 &gam_regs); in program_gamut_remap()
141 &gam_regs); in program_gamut_remap()
151 &gam_regs); in program_gamut_remap()
209 &gam_regs); in read_gamut_remap()
219 &gam_regs); in read_gamut_remap()
229 &gam_regs); in read_gamut_remap()
301 &gam_regs); in dpp1_cm_program_color_matrix()
438 struct xfer_func_reg gam_regs; in dpp1_cm_program_regamma_luta_settings() local
467 struct xfer_func_reg gam_regs; in dpp1_cm_program_regamma_lutb_settings() local
558 &gam_regs); in dpp1_program_input_csc()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn30/
H A Ddcn30_dpp_cm.c221 struct dcn3_xfer_func_reg gam_regs; in dpp3_program_gamcor_lut() local
259 gam_regs.offset_b = REG(CM_GAMCOR_RAMB_OFFSET_B); in dpp3_program_gamcor_lut()
260 gam_regs.offset_g = REG(CM_GAMCOR_RAMB_OFFSET_G); in dpp3_program_gamcor_lut()
261 gam_regs.offset_r = REG(CM_GAMCOR_RAMB_OFFSET_R); in dpp3_program_gamcor_lut()
290 dpp3_gamcor_reg_field(dpp, &gam_regs); in dpp3_program_gamcor_lut()
320 struct color_matrices_reg gam_regs; in program_gamut_remap() local
354 &gam_regs); in program_gamut_remap()
364 &gam_regs); in program_gamut_remap()
413 struct color_matrices_reg gam_regs; in read_gamut_remap() local
432 &gam_regs); in read_gamut_remap()
[all …]
H A Ddcn30_dpp.c100 struct color_matrices_reg gam_regs; in dpp3_program_post_csc() local
137 gam_regs.masks.csc_c12 = dpp->tf_mask->CM_POST_CSC_C12; in dpp3_program_post_csc()
141 gam_regs.csc_c11_c12 = REG(CM_POST_CSC_C11_C12); in dpp3_program_post_csc()
142 gam_regs.csc_c33_c34 = REG(CM_POST_CSC_C33_C34); in dpp3_program_post_csc()
146 gam_regs.csc_c11_c12 = REG(CM_POST_CSC_B_C11_C12); in dpp3_program_post_csc()
147 gam_regs.csc_c33_c34 = REG(CM_POST_CSC_B_C33_C34); in dpp3_program_post_csc()
154 &gam_regs); in dpp3_program_post_csc()
703 struct dcn3_xfer_func_reg gam_regs; in dpp3_program_blnd_luta_settings() local
705 dcn3_dpp_cm_get_reg_field(dpp, &gam_regs); in dpp3_program_blnd_luta_settings()
731 struct dcn3_xfer_func_reg gam_regs; in dpp3_program_blnd_lutb_settings() local
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dwb/dcn30/
H A Ddcn30_dwb_cm.c85 struct dcn3_xfer_func_reg gam_regs; in dwb3_program_ogam_luta_settings() local
87 dwb3_get_reg_field_ogam(dwbc30, &gam_regs); in dwb3_program_ogam_luta_settings()
104 gam_regs.offset_b = REG(DWB_OGAM_RAMA_OFFSET_B); in dwb3_program_ogam_luta_settings()
105 gam_regs.offset_g = REG(DWB_OGAM_RAMA_OFFSET_G); in dwb3_program_ogam_luta_settings()
106 gam_regs.offset_r = REG(DWB_OGAM_RAMA_OFFSET_R); in dwb3_program_ogam_luta_settings()
118 struct dcn3_xfer_func_reg gam_regs; in dwb3_program_ogam_lutb_settings() local
120 dwb3_get_reg_field_ogam(dwbc30, &gam_regs); in dwb3_program_ogam_lutb_settings()
137 gam_regs.offset_b = REG(DWB_OGAM_RAMB_OFFSET_B); in dwb3_program_ogam_lutb_settings()
308 struct color_matrices_reg gam_regs; in dwb3_program_gamut_remap() local
331 &gam_regs); in dwb3_program_gamut_remap()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/mpc/dcn20/
H A Ddcn20_mpc.c326 struct xfer_func_reg gam_regs; in mpc2_program_lutb() local
328 mpc2_ogam_get_reg_field(mpc, &gam_regs); in mpc2_program_lutb()
330 gam_regs.start_cntl_b = REG(MPCC_OGAM_RAMB_START_CNTL_B[mpcc_id]); in mpc2_program_lutb()
342 gam_regs.region_start = REG(MPCC_OGAM_RAMB_REGION_0_1[mpcc_id]); in mpc2_program_lutb()
343 gam_regs.region_end = REG(MPCC_OGAM_RAMB_REGION_32_33[mpcc_id]); in mpc2_program_lutb()
345 cm_helper_program_xfer_func(mpc20->base.ctx, params, &gam_regs); in mpc2_program_lutb()
353 struct xfer_func_reg gam_regs; in mpc2_program_luta() local
355 mpc2_ogam_get_reg_field(mpc, &gam_regs); in mpc2_program_luta()
369 gam_regs.region_start = REG(MPCC_OGAM_RAMA_REGION_0_1[mpcc_id]); in mpc2_program_luta()
370 gam_regs.region_end = REG(MPCC_OGAM_RAMA_REGION_32_33[mpcc_id]); in mpc2_program_luta()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/dpp/dcn20/
H A Ddcn20_dpp_cm.c167 struct color_matrices_reg gam_regs; in program_gamut_remap() local
195 gam_regs.csc_c11_c12 = REG(CM_GAMUT_REMAP_C11_C12); in program_gamut_remap()
196 gam_regs.csc_c33_c34 = REG(CM_GAMUT_REMAP_C33_C34); in program_gamut_remap()
205 &gam_regs); in program_gamut_remap()
241 struct color_matrices_reg gam_regs; in read_gamut_remap() local
261 &gam_regs); in read_gamut_remap()
269 &gam_regs); in read_gamut_remap()
446 struct xfer_func_reg gam_regs; in dpp20_program_blnd_luta_settings() local
448 dcn20_dpp_cm_get_reg_field(dpp, &gam_regs); in dpp20_program_blnd_luta_settings()
474 struct xfer_func_reg gam_regs; in dpp20_program_blnd_lutb_settings() local
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/mpc/dcn30/
H A Ddcn30_mpc.c239 struct dcn3_xfer_func_reg gam_regs; in mpc3_program_luta() local
241 mpc3_ogam_get_reg_field(mpc, &gam_regs); in mpc3_program_luta()
258 gam_regs.offset_b = REG(MPCC_OGAM_RAMA_OFFSET_B[mpcc_id]); in mpc3_program_luta()
272 struct dcn3_xfer_func_reg gam_regs; in mpc3_program_lutb() local
274 mpc3_ogam_get_reg_field(mpc, &gam_regs); in mpc3_program_lutb()
1073 struct color_matrices_reg gam_regs; in program_gamut_remap() local
1107 &gam_regs); in program_gamut_remap()
1117 &gam_regs); in program_gamut_remap()
1165 struct color_matrices_reg gam_regs; in read_gamut_remap() local
1182 &gam_regs); in read_gamut_remap()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/mpc/dcn32/
H A Ddcn32_mpc.c174 struct dcn3_xfer_func_reg gam_regs; in mpc32_program_post1dluta_settings() local
176 mpc32_post1dlut_get_reg_field(mpc30, &gam_regs); in mpc32_program_post1dluta_settings()
178 gam_regs.start_cntl_b = REG(MPCC_MCM_1DLUT_RAMA_START_CNTL_B[mpcc_id]); in mpc32_program_post1dluta_settings()
190 gam_regs.region_start = REG(MPCC_MCM_1DLUT_RAMA_REGION_0_1[mpcc_id]); in mpc32_program_post1dluta_settings()
191 gam_regs.region_end = REG(MPCC_MCM_1DLUT_RAMA_REGION_32_33[mpcc_id]); in mpc32_program_post1dluta_settings()
193 cm_helper_program_gamcor_xfer_func(mpc->ctx, params, &gam_regs); in mpc32_program_post1dluta_settings()
203 struct dcn3_xfer_func_reg gam_regs; in mpc32_program_post1dlutb_settings() local
205 mpc32_post1dlut_get_reg_field(mpc30, &gam_regs); in mpc32_program_post1dlutb_settings()
219 gam_regs.region_start = REG(MPCC_MCM_1DLUT_RAMB_REGION_0_1[mpcc_id]); in mpc32_program_post1dlutb_settings()
220 gam_regs.region_end = REG(MPCC_MCM_1DLUT_RAMB_REGION_32_33[mpcc_id]); in mpc32_program_post1dlutb_settings()
[all …]