Searched refs:g4x (Results 1 – 20 of 20) sorted by relevance
247 dev_priv->display.wm.g4x.cxsr = enable; in intel_set_memory_cxsr()1206 raw = &crtc_state->wm.g4x.raw[level]; in _g4x_compute_pipe_wm()1214 raw = &crtc_state->wm.g4x.raw[level]; in _g4x_compute_pipe_wm()1225 raw = &crtc_state->wm.g4x.raw[level]; in _g4x_compute_pipe_wm()1452 crtc->wm.active.g4x = crtc_state->wm.g4x.intermediate; in g4x_initial_watermarks()1468 crtc->wm.active.g4x = crtc_state->wm.g4x.optimal; in g4x_optimize_watermarks()3800 raw = &crtc_state->wm.g4x.raw[level]; in g4x_wm_get_hw_state()3878 &crtc_state->wm.g4x.raw[level]; in g4x_wm_sanitize()3895 crtc_state->wm.g4x.intermediate = in g4x_wm_sanitize()3896 crtc_state->wm.g4x.optimal; in g4x_wm_sanitize()[all …]
221 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_fbc_max_cfb_height()445 if (display->platform.g4x) in g4x_dpfc_ctl()776 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_fbc_cfb_base_max()808 if (display->platform.g4x) in intel_fbc_max_limit()856 if (DISPLAY_VER(display) < 5 && !display->platform.g4x) { in intel_fbc_alloc_cfb()1003 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in stride_is_valid()1042 if (display->platform.g4x) in g4x_fbc_pixel_format_is_valid()1072 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in pixel_format_is_valid()1106 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in rotation_is_valid()1124 } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) { in intel_fbc_max_surface_size()[all …]
145 if (display->platform.g4x) in g4x_hdmi_compute_config()620 if (!display->platform.g4x) in g4x_hdmi_connector_atomic_check()670 if (display->platform.g4x || display->platform.valleyview) in is_hdmi_port_valid()777 if (display->platform.g4x) in g4x_hdmi_init()
145 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in i9xx_plane_has_windowing()164 if (display->platform.g4x || display->platform.ironlake || in i9xx_plane_ctl()992 else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()1013 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()1047 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_primary_plane_create()
269 struct g4x_wm_values g4x; member
115 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_crtc_max_vblank_count()357 display->platform.g4x) in intel_crtc_init()
403 if (DISPLAY_VER(display) < 5 && !display->platform.g4x) in i9xx_cursor_ctl_crtc()758 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in i9xx_cursor_get_hw_state()1054 if (DISPLAY_VER(display) >= 5 || display->platform.g4x) in intel_cursor_plane_create()
67 if (display->platform.g4x) { in g4x_dp_set_clock()152 if (display->platform.g4x && pipe_config->limited_color_range) in intel_dp_prepare()389 if (display->platform.g4x && tmp & DP_COLOR_RANGE_16_235) in intel_dp_get_config()
419 PLATFORM_GROUP(g4x),429 PLATFORM_GROUP(g4x),1767 } else if (DISPLAY_VER(display) >= 5 || display->platform.g4x) { in __intel_display_device_info_runtime_init()1894 DISPLAY_VER(display) < 5 && !display->platform.g4x) in intel_display_device_info_runtime_init()
26 func(g4x) /* g45 and gm45 */ \
2908 if (display->platform.g4x || display->platform.valleyview || in i9xx_set_pipeconf()3007 if (display->platform.g4x || display->platform.valleyview || in i9xx_get_pipe_config()4204 if (DISPLAY_VER(display) < 5 && !display->platform.g4x && in intel_crtc_atomic_check()4314 if (display->platform.g4x || display->platform.valleyview || in compute_baseline_pipe_bpp()4554 if (display->platform.g4x || in intel_crtc_prepare_cleared_state()5314 if (display->platform.g4x || DISPLAY_VER(display) >= 5) in intel_pipe_config_compare()7774 if (!found && display->platform.g4x) { in intel_setup_outputs()7780 if (!found && display->platform.g4x) in intel_setup_outputs()7793 if (display->platform.g4x) { in intel_setup_outputs()7798 if (display->platform.g4x) in intel_setup_outputs()[all …]
337 display->platform.g4x || DISPLAY_VER(display) == 2 || in i915_get_crtc_scanoutpos()
901 } g4x; member1400 struct g4x_wm_state g4x; member
894 if (display->platform.g4x) in intel_audio_hooks_init()
94 else if (display->platform.i965gm || display->platform.g4x || in i915_sr_status()
1212 if (display->platform.g4x) in g4x_sprite_update_arm()
1128 if (display->platform.g4x) in i965_hz_to_pwm()
2734 if (display->platform.g4x) in intel_dp_port_has_audio()6294 if (!display->platform.g4x && port != PORT_A) in intel_dp_add_properties()
2728 return DISPLAY_VER(display) >= 5 || display->platform.g4x; in has_ddi_port_info()
728 CG_FUNCS(g4x);