Home
last modified time | relevance | path

Searched refs:fw_shared (Results 1 – 11 of 11) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v5_0_1.c81 struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_1_fw_shared_init() local
83 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v5_0_1_fw_shared_init()
85 if (fw_shared->sq.is_enabled) in vcn_v5_0_1_fw_shared_init()
87 fw_shared->present_flag_0 = in vcn_v5_0_1_fw_shared_init()
89 fw_shared->sq.is_enabled = 1; in vcn_v5_0_1_fw_shared_init()
167 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_1_sw_fini()
168 fw_shared->present_flag_0 = 0; in vcn_v5_0_1_sw_fini()
169 fw_shared->sq.is_enabled = 0; in vcn_v5_0_1_sw_fini()
565 adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v5_0_1_start_dpg_mode()
682 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_1_start()
[all …]
H A Dvcn_v4_0_3.c141 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_3_fw_shared_init()
143 fw_shared->sq.is_enabled = 1; in vcn_v4_0_3_fw_shared_init()
262 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_sw_fini()
263 fw_shared->present_flag_0 = 0; in vcn_v4_0_3_sw_fini()
349 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_hw_init()
350 if (!fw_shared->sq.is_enabled) in vcn_v4_0_3_hw_init()
1076 fw_shared = adev->vcn.inst[vcn_inst].fw_shared.cpu_addr; in vcn_v4_0_3_start_sriov()
1077 rb_setup = &fw_shared->rb_setup; in vcn_v4_0_3_start_sriov()
1298 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_3_start()
1323 fw_shared->sq.queue_mode &= in vcn_v4_0_3_start()
[all …]
H A Dvcn_v3_0.c195 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_init() local
275 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_init()
326 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v3_0_sw_fini() local
330 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_sw_fini()
331 fw_shared->present_flag_0 = 0; in vcn_v3_0_sw_fini()
332 fw_shared->sw_ring.is_enabled = false; in vcn_v3_0_sw_fini()
1029 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v3_0_start_dpg_mode() local
1166 fw_shared->rb.rptr = 0; in vcn_v3_0_start_dpg_mode()
1323 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v3_0_start()
1723 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v3_0_pause_dpg_mode()
[all …]
H A Dvcn_v5_0_0.c147 volatile struct amdgpu_vcn5_fw_shared *fw_shared; in vcn_v5_0_0_sw_init() local
188 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_init()
190 fw_shared->sq.is_enabled = 1; in vcn_v5_0_0_sw_init()
231 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_sw_fini()
232 fw_shared->present_flag_0 = 0; in vcn_v5_0_0_sw_fini()
233 fw_shared->sq.is_enabled = 0; in vcn_v5_0_0_sw_fini()
712 volatile struct amdgpu_vcn5_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v5_0_0_start_dpg_mode() local
780 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v5_0_0_start_dpg_mode()
822 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v5_0_0_start()
936 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v5_0_0_start()
[all …]
H A Dvcn_v4_0_5.c155 volatile struct amdgpu_vcn4_fw_shared *fw_shared; in vcn_v4_0_5_sw_init() local
200 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_5_sw_init()
202 fw_shared->sq.is_enabled = 1; in vcn_v4_0_5_sw_init()
254 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_5_sw_fini()
255 fw_shared->present_flag_0 = 0; in vcn_v4_0_5_sw_fini()
256 fw_shared->sq.is_enabled = 0; in vcn_v4_0_5_sw_fini()
914 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_5_start_dpg_mode() local
1009 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v4_0_5_start_dpg_mode()
1056 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_5_start()
1199 fw_shared->sq.queue_mode |= FW_QUEUE_RING_RESET; in vcn_v4_0_5_start()
[all …]
H A Dvcn_v4_0.c153 fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_fw_shared_init()
155 fw_shared->sq.is_enabled = 1; in vcn_v4_0_fw_shared_init()
164 fw_shared->drm_key_wa.method = in vcn_v4_0_fw_shared_init()
292 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_sw_fini()
293 fw_shared->present_flag_0 = 0; in vcn_v4_0_sw_fini()
294 fw_shared->sq.is_enabled = 0; in vcn_v4_0_sw_fini()
1011 volatile struct amdgpu_vcn4_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v4_0_start_dpg_mode() local
1151 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_start()
1444 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v4_0_start_sriov()
1445 rb_setup = &fw_shared->rb_setup; in vcn_v4_0_start_sriov()
[all …]
H A Dvcn_v2_0.c140 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_0_sw_init() local
221 fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_init()
250 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_sw_fini() local
253 fw_shared->present_flag_0 = 0; in vcn_v2_0_sw_fini()
423 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()
425 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr)); in vcn_v2_0_mc_resume()
516 lower_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
519 upper_32_bits(adev->vcn.inst->fw_shared.gpu_addr), 0, indirect); in vcn_v2_0_mc_resume_dpg_mode()
851 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_start_dpg_mode() local
987 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v2_0_start() local
[all …]
H A Dvcn_v2_5.c304 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_init() local
399 fw_shared = adev->vcn.inst[j].fw_shared.cpu_addr; in vcn_v2_5_sw_init()
442 volatile struct amdgpu_fw_shared *fw_shared; in vcn_v2_5_sw_fini() local
448 fw_shared = adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v2_5_sw_fini()
449 fw_shared->present_flag_0 = 0; in vcn_v2_5_sw_fini()
655 lower_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()
657 upper_32_bits(adev->vcn.inst[i].fw_shared.gpu_addr)); in vcn_v2_5_mc_resume()
1022 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst[inst_idx].fw_shared.cpu_addr; in vcn_v2_5_start_dpg_mode() local
1168 volatile struct amdgpu_fw_shared *fw_shared = in vcn_v2_5_start() local
1169 adev->vcn.inst[i].fw_shared.cpu_addr; in vcn_v2_5_start()
[all …]
H A Damdgpu_vcn.c229 adev->vcn.inst[i].fw_shared.cpu_addr = adev->vcn.inst[i].cpu_addr + in amdgpu_vcn_sw_init()
234 adev->vcn.inst[i].fw_shared.mem_size = fw_shared_size; in amdgpu_vcn_sw_init()
237 adev->vcn.inst[i].fw_shared.cpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
238 adev->vcn.inst[i].fw_shared.gpu_addr -= AMDGPU_VCNFW_LOG_SIZE; in amdgpu_vcn_sw_init()
239 adev->vcn.inst[i].fw_shared.log_offset = log_offset; in amdgpu_vcn_sw_init()
1142 if (!vcn->fw_shared.cpu_addr || !amdgpu_vcnfw_log) in amdgpu_debugfs_vcn_fwlog_read()
1145 log_buf = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_debugfs_vcn_fwlog_read()
1214 volatile uint32_t *flag = vcn->fw_shared.cpu_addr; in amdgpu_vcn_fwlog_init()
1215 void *fw_log_cpu_addr = vcn->fw_shared.cpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
1216 uint64_t fw_log_gpu_addr = vcn->fw_shared.gpu_addr + vcn->fw_shared.mem_size; in amdgpu_vcn_fwlog_init()
[all …]
H A Damdgpu_vcn.h315 struct amdgpu_vcn_fw_shared fw_shared; member
H A Dvcn_v1_0.c196 volatile struct amdgpu_fw_shared *fw_shared = adev->vcn.inst->fw_shared.cpu_addr; in vcn_v1_0_sw_init() local
198 fw_shared->present_flag_0 = 0; in vcn_v1_0_sw_init()