Searched refs:fclk_pstate_supported (Results 1 – 5 of 5) sorted by relevance
496 in_out->programming->fclk_pstate_supported = true; in determine_power_management_features_with_vblank_only()547 if (in_out->programming->fclk_pstate_supported == false) { in determine_power_management_features_with_vactive_and_vblank()555 in_out->programming->fclk_pstate_supported = true; in determine_power_management_features_with_vactive_and_vblank()661 in_out->programming->fclk_pstate_supported = false; in map_mode_to_soc_dpm()685 if (in_out->programming->fclk_pstate_supported == false) in dpmm_dcn3_map_mode_to_soc_dpm()706 in_out->programming->fclk_pstate_supported = true; in dpmm_dcn4_map_mode_to_soc_dpm()712 in_out->programming->fclk_pstate_supported = true; in dpmm_dcn4_map_mode_to_soc_dpm()719 if (in_out->programming->fclk_pstate_supported == false) in dpmm_dcn4_map_mode_to_soc_dpm()
407 bool fclk_pstate_supported; member
203 unsigned int fclk_pstate_supported; member
435 …in_out->mode_support_result.global.fclk_pstate_supported = l->mode_support_ex_params.out_evaluatio… in core_dcn4_mode_support()
1084 ….clk.fclk_p_state_change_support = in_ctx->v21.mode_programming.programming->fclk_pstate_supported; in dml21_copy_clocks_to_dc_state()