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Searched refs:fclk_khz (Results 1 – 23 of 23) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
H A Drv1_clk_mgr.c226 || new_clocks->fclk_khz > clk_mgr_base->clks.fclk_khz in rv1_update_clocks()
237 new_clocks->fclk_khz = debug->force_fclk_khz; in rv1_update_clocks()
239 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks()
240 clk_mgr_base->clks.fclk_khz = new_clocks->fclk_khz; in rv1_update_clocks()
264 pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->fclk_khz)); in rv1_update_clocks()
284 pp_smu->set_hard_min_fclk_by_freq(&pp_smu->pp_smu, khz_to_mhz_ceil(new_clocks->fclk_khz)); in rv1_update_clocks()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_dpmm/
H A Ddml2_dpmm_dcn4.c289 result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.active.fclk_khz, &state_table->fclk); in map_soc_min_clocks_to_dpm_fine_grained()
296 …result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.svp_prefetch.fclk_khz, &state_table->… in map_soc_min_clocks_to_dpm_fine_grained()
303 result = round_up_to_next_dpm(&display_cfg->min_clocks.dcn4x.idle.fclk_khz, &state_table->fclk); in map_soc_min_clocks_to_dpm_fine_grained()
313 display_cfg->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz = 0; in map_soc_min_clocks_to_dpm_fine_grained()
329 display_cfg->min_clocks.dcn4x.active.fclk_khz <= state_table->fclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
332 display_cfg->min_clocks.dcn4x.active.fclk_khz = state_table->fclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
343 display_cfg->min_clocks.dcn4x.idle.fclk_khz <= state_table->fclk.clk_values_khz[index] && in map_soc_min_clocks_to_dpm_coarse_grained()
346 display_cfg->min_clocks.dcn4x.idle.fclk_khz = state_table->fclk.clk_values_khz[index]; in map_soc_min_clocks_to_dpm_coarse_grained()
356 display_cfg->min_clocks.dcn4x.svp_prefetch.fclk_khz = 0; in map_soc_min_clocks_to_dpm_coarse_grained()
608 …>programming->min_clocks.dcn4x.svp_prefetch.fclk_khz > in_out->programming->min_clocks.dcn4x.activ… in map_mode_to_soc_dpm()
[all …]
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c351 int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000; in dcn2_update_clocks_fpga()
378 if (should_set_clock(safe_to_lower, fclk_adj, clk_mgr->clks.fclk_khz)) { in dcn2_update_clocks_fpga()
379 clk_mgr->clks.fclk_khz = fclk_adj; in dcn2_update_clocks_fpga()
390 if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz) in dcn2_update_clocks_fpga()
391 clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz; in dcn2_update_clocks_fpga()
392 if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz) in dcn2_update_clocks_fpga()
393 clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz; in dcn2_update_clocks_fpga()
396 clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz; in dcn2_update_clocks_fpga()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/inc/
H A Ddml_top_types.h363 unsigned long fclk_khz; member
373 unsigned long fclk_khz; member
378 unsigned long fclk_khz; member
383 unsigned long fclk_khz; member
388 unsigned long fclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_debug.c195 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
203 context->bw_ctx.bw.dcn.clk.fclk_khz, in context_clock_trace()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/
H A Ddcn35_clk_mgr.c1110 int fclk_adj = new_clocks->fclk_khz; in dcn35_update_clocks_fpga()
1118 new_clocks->fclk_khz = 4320000; in dcn35_update_clocks_fpga()
1145 if (should_set_clock(safe_to_lower, fclk_adj, clk_mgr->clks.fclk_khz)) { in dcn35_update_clocks_fpga()
1146 clk_mgr->clks.fclk_khz = fclk_adj; in dcn35_update_clocks_fpga()
1157 if (clk_mgr->clks.fclk_khz > clk_mgr->clks.dppclk_khz) in dcn35_update_clocks_fpga()
1158 clk_mgr->clks.dppclk_khz = clk_mgr->clks.fclk_khz; in dcn35_update_clocks_fpga()
1159 if (clk_mgr->clks.dppclk_khz > clk_mgr->clks.fclk_khz) in dcn35_update_clocks_fpga()
1160 clk_mgr->clks.fclk_khz = clk_mgr->clks.dppclk_khz; in dcn35_update_clocks_fpga()
1163 clk_mgr_int->dccg->ref_dppclk = clk_mgr->clks.fclk_khz; in dcn35_update_clocks_fpga()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn401/
H A Ddcn401_clk_mgr.c431 fclk_khz_override = new_clocks->fclk_khz; in dcn401_auto_dpm_test_log()
452 new_clocks->fclk_khz > 0 && in dcn401_auto_dpm_test_log()
779 int active_fclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.fclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
947 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in dcn401_build_update_bandwidth_clocks_sequence()
948 clk_mgr_base->clks.fclk_khz = new_clocks->fclk_khz; in dcn401_build_update_bandwidth_clocks_sequence()
952 active_fclk_mhz = khz_to_mhz_ceil(clk_mgr_base->clks.fclk_khz); in dcn401_build_update_bandwidth_clocks_sequence()
1361 return clk_mgr->base.ctx->dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz; in dcn401_get_hard_min_fclk()
/linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_trace.h500 __field(int, fclk_khz)
518 __entry->fclk_khz = clk->fclk_khz;
543 __entry->fclk_khz,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
H A Ddml2_internal_shared_types.h186 unsigned long fclk_khz; member
195 unsigned long fclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_wrapper.h61 unsigned int fclk_khz; member
H A Ddml2_utils.c187 context->bw_ctx.bw.dcn.clk.fclk_khz = out_clks->fclk_khz; in dml2_copy_clocks_to_dc_state()
H A Ddml2_wrapper.c593 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
651 …out_clks.fclk_khz = (unsigned int)dml2->v20.dml_core_ctx.states.state_array[lowest_state_idx].fabr… in dml2_validate_and_build_resource()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c1080 …context->bw_ctx.bw.dcn.clk.fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.a… in dml21_copy_clocks_to_dc_state()
1082 …w.dcn.clk.idle_fclk_khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.idle.fclk_khz; in dml21_copy_clocks_to_dc_state()
1090 …khz = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.svp_prefetch_no_throttle.fclk_khz; in dml21_copy_clocks_to_dc_state()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_dcn4.c438 …in_out->mode_support_result.global.active.fclk_khz = (unsigned long)(core->clean_me_up.mode_lib.ms… in core_dcn4_mode_support()
442 …in_out->mode_support_result.global.svp_prefetch.fclk_khz = (unsigned long)core->clean_me_up.mode_l… in core_dcn4_mode_support()
H A Ddml2_core_dcn4_calcs.c10437 mode_lib->mp.FabricClock = programming->min_clocks.dcn4x.active.fclk_khz / 1000.0; in dml_core_mode_programming()
/linux-6.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn32/
H A Ddcn32_clk_mgr.c539 fclk_khz_override = new_clocks->fclk_khz; in dcn32_auto_dpm_test_log()
560 new_clocks->fclk_khz > 0 && in dcn32_auto_dpm_test_log()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c482 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_get_clock_states()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c570 context->bw_ctx.bw.dcn.clk.fclk_khz = 0; in dcn31_calculate_wm_and_dlg_fp()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c1157 context->bw_ctx.bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 / in dcn_validate_bandwidth()
1160 context->bw_ctx.bw.dcn.clk.fclk_khz = (int)(bw_consumed * 1000000 / 32); in dcn_validate_bandwidth()
/linux-6.15/drivers/gpu/drm/amd/display/dc/
H A Ddc.h603 int fclk_khz; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn32/
H A Ddcn32_fpu.c1661 context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000; in dcn32_calculate_dlg_params()
1770 context->bw_ctx.bw.dcn.clk.fclk_khz = 0; in dcn32_calculate_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddcn20_fpu.c1163 context->bw_ctx.bw.dcn.clk.fclk_khz = context->bw_ctx.dml.vba.FabricClock * 1000; in dcn20_calculate_dlg_params()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn10/
H A Ddcn10_hwseq.c530 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz, in dcn10_log_hw_state()