| /linux-6.15/drivers/gpu/drm/radeon/ |
| H A D | atombios_crtc.c | 1332 fb_format |= EVERGREEN_GRPH_BANK_WIDTH(bankw); in dce4_crtc_do_set_base() 1506 fb_format = in avivo_crtc_do_set_base() 1512 fb_format = in avivo_crtc_do_set_base() 1520 fb_format = in avivo_crtc_do_set_base() 1528 fb_format = in avivo_crtc_do_set_base() 1537 fb_format = in avivo_crtc_do_set_base() 1546 fb_format = in avivo_crtc_do_set_base() 1557 fb_format = in avivo_crtc_do_set_base() 1565 fb_format |= AVIVO_D1GRPH_SWAP_RB; in avivo_crtc_do_set_base() 1583 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; in avivo_crtc_do_set_base() [all …]
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| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | dce_v10_0.c | 1901 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v10_0_crtc_do_set_base() 1906 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 2); in dce_v10_0_crtc_do_set_base() 1915 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v10_0_crtc_do_set_base() 1924 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 5); in dce_v10_0_crtc_do_set_base() 1932 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); in dce_v10_0_crtc_do_set_base() 1941 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v10_0_crtc_do_set_base() 1950 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); in dce_v10_0_crtc_do_set_base() 1961 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 4); in dce_v10_0_crtc_do_set_base() 1972 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v10_0_crtc_do_set_base() 1996 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v10_0_crtc_do_set_base() [all …]
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| H A D | dce_v11_0.c | 1951 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v11_0_crtc_do_set_base() 1956 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 2); in dce_v11_0_crtc_do_set_base() 1965 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v11_0_crtc_do_set_base() 1974 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 5); in dce_v11_0_crtc_do_set_base() 1982 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); in dce_v11_0_crtc_do_set_base() 1991 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v11_0_crtc_do_set_base() 2000 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 1); in dce_v11_0_crtc_do_set_base() 2011 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 4); in dce_v11_0_crtc_do_set_base() 2022 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); in dce_v11_0_crtc_do_set_base() 2046 fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_ARRAY_MODE, in dce_v11_0_crtc_do_set_base() [all …]
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| H A D | dce_v8_0.c | 1803 uint32_t fb_format, fb_pitch_pixels; in dce_v8_0_crtc_do_set_base() local 1847 fb_format = ((GRPH_DEPTH_8BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) | in dce_v8_0_crtc_do_set_base() 1934 fb_format |= (num_banks << GRPH_CONTROL__GRPH_NUM_BANKS__SHIFT); in dce_v8_0_crtc_do_set_base() 1936 fb_format |= (tile_split << GRPH_CONTROL__GRPH_TILE_SPLIT__SHIFT); in dce_v8_0_crtc_do_set_base() 1937 fb_format |= (bankw << GRPH_CONTROL__GRPH_BANK_WIDTH__SHIFT); in dce_v8_0_crtc_do_set_base() 1938 fb_format |= (bankh << GRPH_CONTROL__GRPH_BANK_HEIGHT__SHIFT); in dce_v8_0_crtc_do_set_base() 1962 WREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset, fb_format); in dce_v8_0_crtc_do_set_base() 2621 uint32_t fb_format; in dce_v8_0_panic_flush() local 2631 fb_format = RREG32(mmGRPH_CONTROL + amdgpu_crtc->crtc_offset); in dce_v8_0_panic_flush() 2632 fb_format &= ~GRPH_CONTROL__GRPH_ARRAY_MODE_MASK; in dce_v8_0_panic_flush() [all …]
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| H A D | dce_v6_0.c | 1929 fb_format = (GRPH_DEPTH(GRPH_DEPTH_8BPP) | in dce_v6_0_crtc_do_set_base() 1934 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base() 1942 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base() 1950 fb_format = (GRPH_DEPTH(GRPH_DEPTH_16BPP) | in dce_v6_0_crtc_do_set_base() 2016 fb_format |= GRPH_NUM_BANKS(num_banks); in dce_v6_0_crtc_do_set_base() 2018 fb_format |= GRPH_TILE_SPLIT(tile_split); in dce_v6_0_crtc_do_set_base() 2019 fb_format |= GRPH_BANK_WIDTH(bankw); in dce_v6_0_crtc_do_set_base() 2020 fb_format |= GRPH_BANK_HEIGHT(bankh); in dce_v6_0_crtc_do_set_base() 2027 fb_format |= GRPH_PIPE_CONFIG(pipe_config); in dce_v6_0_crtc_do_set_base() 2661 uint32_t fb_format; in dce_v6_0_panic_flush() local [all …]
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| /linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| H A D | amdgpu_dm_trace.h | 234 __field(uint32_t, fb_format) 263 __entry->fb_format = state->fb ? state->fb->format->format : 0; 294 (__entry->fb_format & 0xff) ? (__entry->fb_format & 0xff) : 'N', 295 ((__entry->fb_format >> 8) & 0xff) ? ((__entry->fb_format >> 8) & 0xff) : 'O', 296 ((__entry->fb_format >> 16) & 0xff) ? ((__entry->fb_format >> 16) & 0xff) : 'N', 297 ((__entry->fb_format >> 24) & 0x7f) ? ((__entry->fb_format >> 24) & 0x7f) : 'E',
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| /linux-6.15/drivers/gpu/drm/ |
| H A D | drm_format_helper.c | 1131 uint32_t fb_format = fb->format->format; in drm_fb_blit() local 1133 if (fb_format == dst_format) { in drm_fb_blit() 1136 } else if (fb_format == (dst_format | DRM_FORMAT_BIG_ENDIAN)) { in drm_fb_blit() 1139 } else if (fb_format == (dst_format & ~DRM_FORMAT_BIG_ENDIAN)) { in drm_fb_blit() 1142 } else if (fb_format == DRM_FORMAT_XRGB8888) { in drm_fb_blit() 1183 &fb_format, &dst_format); in drm_fb_blit()
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| /linux-6.15/arch/mips/include/uapi/asm/ |
| H A D | inst.h | 825 struct fb_format { /* FPU branch format (MIPS32) */ struct 1136 struct fb_format fb_format; member
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| /linux-6.15/arch/mips/math-emu/ |
| H A D | cp1emu.c | 113 mips32_insn.fb_format.opcode = cop1_op; in microMIPS32_to_MIPS32() 114 mips32_insn.fb_format.bc = bc_op; in microMIPS32_to_MIPS32() 115 mips32_insn.fb_format.flag = in microMIPS32_to_MIPS32()
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