Searched refs:dummy_single_array (Results 1 – 6 of 6) sorted by relevance
900 double dummy_single_array[DML2_MAX_PLANES]; member1006 double dummy_single_array[2][DML2_MAX_PLANES]; member
9498 …CalculateWatermarks_params->MaxActiveDRAMClockChangeLatencySupported = &s->dummy_single_array[0]; … in dml_core_mode_support()10639 CalculateSwathAndDETConfiguration_params->MaximumSwathWidthLuma = s->dummy_single_array[0]; in dml_core_mode_programming()10640 CalculateSwathAndDETConfiguration_params->MaximumSwathWidthChroma = s->dummy_single_array[1]; in dml_core_mode_programming()11328 CalculatePrefetchSchedule_params->RequiredPrefetchBWOTO = &s->dummy_single_array[0][k]; in dml_core_mode_programming()11471 calculate_peak_bandwidth_params->prefetch_bandwidth_oto = s->dummy_single_array[0]; in dml_core_mode_programming()11611 calculate_peak_bandwidth_params->prefetch_bandwidth_oto = s->dummy_single_array[0]; in dml_core_mode_programming()
1660 dml_float_t dummy_single_array[__DML_NUM_PLANES__]; member1711 dml_float_t dummy_single_array[2][__DML_NUM_PLANES__]; member
6701 …CalculateWatermarks_params->MaxActiveDRAMClockChangeLatencySupported = &s->dummy_single_array[0]; … in dml_prefetch_check()8508 CalculateSwathAndDETConfiguration_params->MaximumSwathWidthLuma = s->dummy_single_array[0]; in dml_core_mode_programming()8509 CalculateSwathAndDETConfiguration_params->MaximumSwathWidthChroma = s->dummy_single_array[1]; in dml_core_mode_programming()
188 double dummy_single_array[2][DC__NUM_DPP__MAX]; member
243 .dummy_single_array[0], /* Single MaximumSwathWidthLuma[] */ in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()246 .dummy_single_array[1], /* Single MaximumSwathWidthChroma[] */ in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()