Searched refs:dtbclk_en (Results 1 – 13 of 13) sorted by relevance
162 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn31_update_clocks()164 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn31_update_clocks()188 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn31_update_clocks()190 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn31_update_clocks()323 else if (a->dtbclk_en != b->dtbclk_en) in dcn31_are_clock_states_equal()
157 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn316_update_clocks()159 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn316_update_clocks()176 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn316_update_clocks()178 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn316_update_clocks()
233 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn314_update_clocks()235 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn314_update_clocks()259 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn314_update_clocks()261 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn314_update_clocks()382 else if (a->dtbclk_en != b->dtbclk_en) in dcn314_are_clock_states_equal()
148 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn315_update_clocks()150 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn315_update_clocks()167 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn315_update_clocks()169 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn315_update_clocks()
393 if (new_clocks->dtbclk_en && !new_clocks->ref_dtbclk_khz) in dcn35_update_clocks()408 if (clk_mgr_base->clks.dtbclk_en && !new_clocks->dtbclk_en) { in dcn35_update_clocks()412 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn35_update_clocks()428 if (!clk_mgr_base->clks.dtbclk_en && new_clocks->dtbclk_en) { in dcn35_update_clocks()438 clk_mgr_base->clks.dtbclk_en = new_clocks->dtbclk_en; in dcn35_update_clocks()582 else if (a->dtbclk_en != b->dtbclk_en) in dcn35_are_clock_states_equal()1166 clk_mgr->clks.dtbclk_en = true; in dcn35_update_clocks_fpga()
598 context->bw_ctx.bw.dcn.clk.dtbclk_en = false; in dml2_validate_and_build_resource()656 context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(in_dc, context); in dml2_validate_and_build_resource()
399 clk_mgr->clks.dtbclk_en = false; in dcn2_update_clocks_fpga()
797 if (!new_clocks->dtbclk_en) { in dcn32_update_clocks()
608 bool dtbclk_en; member
1086 …context->bw_ctx.bw.dcn.clk.dtbclk_en = in_ctx->v21.mode_programming.programming->min_clocks.dcn4x.… in dml21_copy_clocks_to_dc_state()
1103 if (!new_clocks->dtbclk_en && dcn401_is_ppclk_dpm_enabled(clk_mgr_internal, PPCLK_DTBCLK)) { in dcn401_build_update_display_clocks_sequence()
1175 context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(dc, context); in dcn20_calculate_dlg_params()
1672 context->bw_ctx.bw.dcn.clk.dtbclk_en = is_dtbclk_required(dc, context); in dcn32_calculate_dlg_params()