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Searched refs:dsc_cfg (Results 1 – 25 of 34) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/
H A Drc_calc_dpi.c89 dsc_cfg->rc_model_size = rc->rc_model_size; in copy_rc_to_cfg()
90 dsc_cfg->rc_edge_factor = rc->rc_edge_factor; in copy_rc_to_cfg()
91 dsc_cfg->rc_tgt_offset_high = rc->rc_tgt_offset_hi; in copy_rc_to_cfg()
92 dsc_cfg->rc_tgt_offset_low = rc->rc_tgt_offset_lo; in copy_rc_to_cfg()
95 dsc_cfg->rc_buf_thresh[i] = rc->rc_buf_thresh[i]; in copy_rc_to_cfg()
103 struct drm_dsc_config dsc_cfg; in dscc_compute_dsc_parameters() local
108 copy_pps_fields(&dsc_cfg, &dsc_params->pps); in dscc_compute_dsc_parameters()
109 copy_rc_to_cfg(&dsc_cfg, rc); in dscc_compute_dsc_parameters()
113 ret = drm_dsc_compute_rc_parameters(&dsc_cfg); in dscc_compute_dsc_parameters()
115 (uint32_t)(div_u64(((uint64_t)dsc_cfg.slice_chunk_size * 0x10000000 + (dsc_cfg.slice_width - 1)), in dscc_compute_dsc_parameters()
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H A Ddc_dsc.c99 timing->dsc_cfg.bits_per_pixel, in dc_bandwidth_in_kbps_from_timing()
100 timing->dsc_cfg.num_slices_h, in dc_bandwidth_in_kbps_from_timing()
101 timing->dsc_cfg.is_dp); in dc_bandwidth_in_kbps_from_timing()
186 struct dc_dsc_config *dsc_cfg);
913 struct dc_dsc_config *dsc_cfg) in setup_dsc_config() argument
951 dsc_cfg->ycbcr422_simple = false; in setup_dsc_config()
1094 dsc_cfg->num_slices_h = num_slices_h; in setup_dsc_config()
1136 dsc_cfg->bits_per_pixel = target_bpp; in setup_dsc_config()
1145 dsc_cfg->is_dp = dsc_sink_caps->is_dp; in setup_dsc_config()
1161 struct dc_dsc_config *dsc_cfg) in dc_dsc_compute_config() argument
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H A Ddsc.h102 …ol (*dsc_validate_stream)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
103 void (*dsc_set_config)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
105 bool (*dsc_get_packed_pps)(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn20/
H A Ddcn20_dsc.c196 dsc_config_log(dsc, dsc_cfg); in dsc2_set_config()
215 dsc_config_log(dsc, dsc_cfg); in dsc2_get_packed_pps()
378 ASSERT(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2); in dsc_prepare_config()
379 ASSERT(dsc_cfg->pic_width); in dsc_prepare_config()
380 ASSERT(dsc_cfg->pic_height); in dsc_prepare_config()
388 if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || in dsc_prepare_config()
389 !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || in dsc_prepare_config()
390 !dsc_cfg->pic_width || !dsc_cfg->pic_height || in dsc_prepare_config()
392 8 <= dsc_cfg->dc_dsc_cfg.linebuf_depth && dsc_cfg->dc_dsc_cfg.linebuf_depth <= 13) || in dsc_prepare_config()
418 dsc_reg_vals->pps.slice_width = dsc_cfg->pic_width / dsc_cfg->dc_dsc_cfg.num_slices_h; in dsc_prepare_config()
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H A Ddcn20_dsc.h575 bool dsc_prepare_config(const struct dsc_config *dsc_cfg,
599 const struct dsc_config *dsc_cfg,
603 bool dsc2_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg);
604 void dsc2_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux-6.15/drivers/gpu/drm/display/
H A Ddrm_dsc_helper.c111 dsc_cfg->dsc_version_minor | in drm_dsc_pps_payload_pack()
118 dsc_cfg->line_buf_depth | in drm_dsc_pps_payload_pack()
158 ((dsc_cfg->initial_xmit_delay & in drm_dsc_pps_payload_pack()
174 dsc_cfg->initial_scale_value; in drm_dsc_pps_payload_pack()
182 ((dsc_cfg->scale_decrement_interval & in drm_dsc_pps_payload_pack()
194 dsc_cfg->first_line_bpg_offset; in drm_dsc_pps_payload_pack()
198 cpu_to_be16(dsc_cfg->nfl_bpg_offset); in drm_dsc_pps_payload_pack()
225 dsc_cfg->rc_quant_incr_limit0; in drm_dsc_pps_payload_pack()
229 dsc_cfg->rc_quant_incr_limit1; in drm_dsc_pps_payload_pack()
238 dsc_cfg->rc_buf_thresh[i]; in drm_dsc_pps_payload_pack()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn314/
H A Ddcn314_hwseq.c84 struct dsc_config dsc_cfg; in update_dsc_on_stream() local
91 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in update_dsc_on_stream()
92 dsc_cfg.color_depth = stream->timing.display_color_depth; in update_dsc_on_stream()
93 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream()
94 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in update_dsc_on_stream()
95 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
96 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
98 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
104 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
107 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c829 struct dsc_config dsc_cfg; in link_set_dsc_on_stream() local
837 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in link_set_dsc_on_stream()
840 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in link_set_dsc_on_stream()
841 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in link_set_dsc_on_stream()
842 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in link_set_dsc_on_stream()
856 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in link_set_dsc_on_stream()
857 dsc_cfg.pic_width *= opp_cnt; in link_set_dsc_on_stream()
959 struct dsc_config dsc_cfg; in link_set_dsc_pps_packet() local
962 memset(&dsc_cfg, 0, sizeof(dsc_cfg)); in link_set_dsc_pps_packet()
968 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in link_set_dsc_pps_packet()
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H A Dlink_validation.c128 if (timing->flags.DSC && !timing->dsc_cfg.is_frl) in dp_active_dongle_validate_timing()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dsc/dcn401/
H A Ddcn401_dsc.c130 bool dsc401_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg) in dsc401_validate_stream() argument
135 if (dsc_cfg->pic_width > dsc401->max_image_width) in dsc401_validate_stream()
138 return dsc_prepare_config(dsc_cfg, &dsc401->reg_vals, &dsc_optc_cfg); in dsc401_validate_stream()
141 void dsc401_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg, in dsc401_set_config() argument
148 dsc_config_log(dsc, dsc_cfg); in dsc401_set_config()
149 is_config_ok = dsc_prepare_config(dsc_cfg, &dsc401->reg_vals, dsc_optc_cfg); in dsc401_set_config()
H A Ddcn401_dsc.h338 bool dsc401_validate_stream(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg…
339 void dsc401_set_config(struct display_stream_compressor *dsc, const struct dsc_config *dsc_cfg,
/linux-6.15/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_stream.c114 memset(&stream->timing.dsc_cfg, 0, sizeof(stream->timing.dsc_cfg)); in dc_stream_construct()
115 stream->timing.dsc_cfg.num_slices_h = 0; in dc_stream_construct()
116 stream->timing.dsc_cfg.num_slices_v = 0; in dc_stream_construct()
117 stream->timing.dsc_cfg.bits_per_pixel = 128; in dc_stream_construct()
118 stream->timing.dsc_cfg.block_pred_enable = 1; in dc_stream_construct()
119 stream->timing.dsc_cfg.linebuf_depth = 9; in dc_stream_construct()
120 stream->timing.dsc_cfg.version_minor = 2; in dc_stream_construct()
121 stream->timing.dsc_cfg.ycbcr422_simple = 0; in dc_stream_construct()
820 stream->timing.dsc_cfg.mst_pbn); in dc_stream_log()
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn35/
H A Ddcn35_hwseq.c336 struct dsc_config dsc_cfg; in update_dsc_on_stream() local
356 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in update_dsc_on_stream()
357 dsc_cfg.color_depth = stream->timing.display_color_depth; in update_dsc_on_stream()
358 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in update_dsc_on_stream()
359 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in update_dsc_on_stream()
360 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in update_dsc_on_stream()
361 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in update_dsc_on_stream()
363 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
369 odm_dsc->funcs->dsc_set_config(odm_dsc, &dsc_cfg, &dsc_optc_cfg); in update_dsc_on_stream()
372 dsc_cfg.dc_dsc_cfg.num_slices_h *= opp_cnt; in update_dsc_on_stream()
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/linux-6.15/include/drm/display/
H A Ddrm_dsc_helper.h25 const struct drm_dsc_config *dsc_cfg);
/linux-6.15/drivers/gpu/drm/amd/display/dc/hwss/dcn32/
H A Ddcn32_hwseq.c1036 struct dsc_config dsc_cfg; in dcn32_update_dsc_on_stream() local
1055 dsc_cfg.pic_width = (stream->timing.h_addressable + pipe_ctx->hblank_borrow + in dcn32_update_dsc_on_stream()
1057 …dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top + stream->timing.v… in dcn32_update_dsc_on_stream()
1058 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in dcn32_update_dsc_on_stream()
1059 dsc_cfg.color_depth = stream->timing.display_color_depth; in dcn32_update_dsc_on_stream()
1060 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dcn32_update_dsc_on_stream()
1061 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn32_update_dsc_on_stream()
1062 ASSERT(dsc_cfg.dc_dsc_cfg.num_slices_h % opp_cnt == 0); in dcn32_update_dsc_on_stream()
1063 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn32_update_dsc_on_stream()
1067 dsc->funcs->dsc_set_config(dsc, &dsc_cfg, &dsc_optc_cfg); in dcn32_update_dsc_on_stream()
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/linux-6.15/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm_mst_types.c884 memset(&params[i].timing->dsc_cfg, 0, sizeof(params[i].timing->dsc_cfg)); in set_dsc_configs_from_fairness_vars()
892 &params[i].timing->dsc_cfg)) { in set_dsc_configs_from_fairness_vars()
896 params[i].timing->dsc_cfg.bits_per_pixel = params[i].bpp_overwrite; in set_dsc_configs_from_fairness_vars()
898 params[i].timing->dsc_cfg.bits_per_pixel = vars[i + k].bpp_x16; in set_dsc_configs_from_fairness_vars()
901 params[i].timing->dsc_cfg.num_slices_h = params[i].num_slices_h; in set_dsc_configs_from_fairness_vars()
904 params[i].timing->dsc_cfg.num_slices_v = params[i].num_slices_v; in set_dsc_configs_from_fairness_vars()
908 params[i].timing->dsc_cfg.mst_pbn = vars[i + k].pbn; in set_dsc_configs_from_fairness_vars()
921 params[i].timing->dsc_cfg.bits_per_pixel, in set_dsc_configs_from_fairness_vars()
1903 &stream->timing.dsc_cfg)) { in dm_dp_mst_is_port_support_mode()
/linux-6.15/drivers/gpu/drm/amd/display/dc/
H A Ddc_dsc.h87 struct dc_dsc_config *dsc_cfg);
H A Ddc_hw_types.h991 struct dc_dsc_config dsc_cfg; member
/linux-6.15/drivers/gpu/drm/amd/display/dc/resource/dcn20/
H A Ddcn20_resource.c1651 struct dsc_config dsc_cfg; in dcn20_validate_dsc() local
1662 dsc_cfg.pic_width = (stream->timing.h_addressable + stream->timing.h_border_left in dcn20_validate_dsc()
1664 dsc_cfg.pic_height = stream->timing.v_addressable + stream->timing.v_border_top in dcn20_validate_dsc()
1666 dsc_cfg.pixel_encoding = stream->timing.pixel_encoding; in dcn20_validate_dsc()
1667 dsc_cfg.color_depth = stream->timing.display_color_depth; in dcn20_validate_dsc()
1668 dsc_cfg.is_odm = pipe_ctx->next_odm_pipe ? true : false; in dcn20_validate_dsc()
1669 dsc_cfg.dc_dsc_cfg = stream->timing.dsc_cfg; in dcn20_validate_dsc()
1670 dsc_cfg.dc_dsc_cfg.num_slices_h /= opp_cnt; in dcn20_validate_dsc()
1672 if (!pipe_ctx->stream_res.dsc->funcs->dsc_validate_stream(pipe_ctx->stream_res.dsc, &dsc_cfg)) in dcn20_validate_dsc()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn401/
H A Ddcn401_dio_stream_encoder.c259 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
544 if (hw_crtc_timing.dsc_cfg.ycbcr422_simple) in enc401_stream_encoder_dp_set_stream_attribute()
/linux-6.15/drivers/gpu/drm/amd/display/modules/power/
H A Dpower_helpers.c955 !stream->timing.dsc_cfg.num_slices_v) in psr_su_set_dsc_slice_height()
961 if (stream->timing.dsc_cfg.num_slices_v == 0) in psr_su_set_dsc_slice_height()
964 slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v; in psr_su_set_dsc_slice_height()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn314/
H A Ddcn314_dio_stream_encoder.c282 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn32/
H A Ddcn32_dio_stream_encoder.c240 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn35/
H A Ddcn35_dio_stream_encoder.c272 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dio/dcn20/
H A Ddcn20_stream_encoder.c464 && !timing->dsc_cfg.ycbcr422_simple); in is_two_pixels_per_containter()

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