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Searched refs:drm_dp_dpcd_writeb (Results 1 – 25 of 29) sorted by relevance

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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Datombios_dp.c482 drm_dp_dpcd_writeb(&amdgpu_connector->ddc_bus->aux, in amdgpu_atombios_dp_set_rx_power_state()
535 drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp); in amdgpu_atombios_dp_set_tp()
550 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
553 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
557 drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1); in amdgpu_atombios_dp_link_train_init()
563 drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp); in amdgpu_atombios_dp_link_train_init()
567 drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp); in amdgpu_atombios_dp_link_train_init()
574 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_init()
587 drm_dp_dpcd_writeb(dp_info->aux, in amdgpu_atombios_dp_link_train_finish()
/linux-6.15/drivers/gpu/drm/display/
H A Ddrm_dp_cec.c99 err = drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_CONTROL, val); in drm_dp_cec_adap_enable()
131 err = drm_dp_dpcd_writeb(aux, DP_CEC_TX_MESSAGE_INFO, in drm_dp_cec_adap_transmit()
153 err = drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_CONTROL, val); in drm_dp_cec_adap_monitor_all_enable()
233 drm_dp_dpcd_writeb(aux, DP_CEC_TUNNELING_IRQ_FLAGS, flags); in drm_dp_cec_handle_irq()
262 drm_dp_dpcd_writeb(aux, DP_DEVICE_SERVICE_IRQ_VECTOR_ESI1, DP_CEC_IRQ); in drm_dp_cec_irq()
H A Ddrm_dp_helper.c499 drm_dp_dpcd_writeb(aux, in drm_dp_lttpr_wake_timeout_setup()
514 drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_EXTENDED_WAIT_TIMEOUT, in drm_dp_lttpr_wake_timeout_setup()
873 drm_dp_dpcd_writeb(aux, DP_PAYLOAD_TABLE_UPDATE_STATUS, in drm_dp_dpcd_write_payload()
2889 int ret = drm_dp_dpcd_writeb(aux, DP_PHY_REPEATER_MODE, val); in drm_dp_lttpr_set_transparent_mode()
3053 err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, in drm_dp_set_phy_test_pattern()
3059 err = drm_dp_dpcd_writeb(aux, in drm_dp_set_phy_test_pattern()
3431 ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_1, buf); in drm_dp_pcon_frl_prepare()
3512 ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_1, buf); in drm_dp_pcon_frl_configure_1()
3542 ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_2, buf); in drm_dp_pcon_frl_configure_2()
3560 ret = drm_dp_dpcd_writeb(aux, DP_PCON_HDMI_LINK_CONFIG_1, 0x0); in drm_dp_pcon_reset_frl_config()
[all …]
H A Ddrm_dp_tunnel.c924 if (drm_dp_dpcd_writeb(tunnel->aux, DP_DPTX_BW_ALLOCATION_MODE_CONTROL, val) < 0) in set_bw_alloc_mode()
1042 if (drm_dp_dpcd_writeb(aux, DP_TUNNELING_STATUS, bw_req_mask) < 0) in clear_bw_req_state()
1098 if (drm_dp_dpcd_writeb(tunnel->aux, DP_REQUEST_BW, request_bw) < 0) { in allocate_tunnel_bw()
1205 if (drm_dp_dpcd_writeb(tunnel->aux, DP_TUNNELING_STATUS, val) < 0) in check_and_clear_status_change()
H A Ddrm_dp_mst_topology.c3682 ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, in drm_dp_mst_topology_mgr_set_mst()
3700 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, 0); in drm_dp_mst_topology_mgr_set_mst()
3766 drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, in drm_dp_mst_topology_mgr_suspend()
3816 ret = drm_dp_dpcd_writeb(mgr->aux, DP_MSTM_CTRL, in drm_dp_mst_topology_mgr_resume()
/linux-6.15/drivers/gpu/drm/radeon/
H A Datombios_dp.c525 drm_dp_dpcd_writeb(&radeon_connector->ddc_bus->aux, in radeon_dp_set_rx_power_state()
592 drm_dp_dpcd_writeb(dp_info->aux, DP_TRAINING_PATTERN_SET, tp); in radeon_dp_set_tp()
606 drm_dp_dpcd_writeb(dp_info->aux, in radeon_dp_link_train_init()
609 drm_dp_dpcd_writeb(dp_info->aux, in radeon_dp_link_train_init()
613 drm_dp_dpcd_writeb(dp_info->aux, DP_EDP_CONFIGURATION_SET, 1); in radeon_dp_link_train_init()
619 drm_dp_dpcd_writeb(dp_info->aux, DP_LANE_COUNT_SET, tmp); in radeon_dp_link_train_init()
623 drm_dp_dpcd_writeb(dp_info->aux, DP_LINK_BW_SET, tmp); in radeon_dp_link_train_init()
634 drm_dp_dpcd_writeb(dp_info->aux, in radeon_dp_link_train_init()
646 drm_dp_dpcd_writeb(dp_info->aux, in radeon_dp_link_train_finish()
/linux-6.15/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.c124 ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); in analogix_dp_enable_sink_psr()
132 ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); in analogix_dp_enable_sink_psr()
140 ret = drm_dp_dpcd_writeb(&dp->aux, DP_PSR_EN_CFG, psr_en); in analogix_dp_enable_sink_psr()
169 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, in analogix_dp_enable_rx_to_enhanced_mode()
173 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, in analogix_dp_enable_rx_to_enhanced_mode()
220 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_training_pattern_dis()
277 retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_link_start()
404 retval = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_process_clock_recovery()
769 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_enable_scramble()
778 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in analogix_dp_enable_scramble()
[all …]
H A Danalogix-anx6345.c161 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_SET_POWER, dpcd[0]); in anx6345_dp_link_training()
190 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL, in anx6345_dp_link_training()
195 err = drm_dp_dpcd_writeb(&anx6345->aux, DP_DOWNSPREAD_CTRL, 0); in anx6345_dp_link_training()
H A Danalogix-anx78xx.c674 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_SET_POWER, dpcd[0]); in anx78xx_dp_link_training()
703 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL, in anx78xx_dp_link_training()
708 err = drm_dp_dpcd_writeb(&anx78xx->aux, DP_DOWNSPREAD_CTRL, 0); in anx78xx_dp_link_training()
/linux-6.15/drivers/gpu/drm/tegra/
H A Ddp.c281 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in drm_dp_link_power_up()
318 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in drm_dp_link_power_down()
360 err = drm_dp_dpcd_writeb(aux, DP_MAIN_LINK_CHANNEL_CODING_SET, value); in drm_dp_link_configure()
365 err = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, in drm_dp_link_configure()
516 err = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, pattern); in drm_dp_link_apply_training()
/linux-6.15/drivers/gpu/drm/xlnx/
H A Dzynqmp_dp.c772 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_link_train_cr()
842 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_link_train_ce()
895 drm_dp_dpcd_writeb(&dp->aux, DP_DOWNSPREAD_CTRL, in zynqmp_dp_setup()
899 drm_dp_dpcd_writeb(&dp->aux, DP_DOWNSPREAD_CTRL, 0); in zynqmp_dp_setup()
902 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LANE_COUNT_SET, aux_lane_cnt); in zynqmp_dp_setup()
908 ret = drm_dp_dpcd_writeb(&dp->aux, DP_MAIN_LINK_CHANNEL_CODING_SET, in zynqmp_dp_setup()
915 ret = drm_dp_dpcd_writeb(&dp->aux, DP_LINK_BW_SET, bw_code); in zynqmp_dp_setup()
966 ret = drm_dp_dpcd_writeb(&dp->aux, DP_TRAINING_PATTERN_SET, in zynqmp_dp_train()
1609 ret = drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, in zynqmp_dp_bridge_atomic_enable()
1638 drm_dp_dpcd_writeb(&dp->aux, DP_SET_POWER, DP_SET_POWER_D3); in zynqmp_dp_bridge_atomic_disable()
[all …]
/linux-6.15/drivers/gpu/drm/mediatek/
H A Dmtk_dp.c1378 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); in mtk_dp_aux_panel_poweron()
1382 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_SET_POWER, DP_SET_POWER_D3); in mtk_dp_aux_panel_poweron()
1562 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_LANE0_SET + lane, in mtk_dp_train_update_swing_pre()
1603 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_LINK_BW_SET, target_link_rate); in mtk_dp_train_setting()
1604 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_LANE_COUNT_SET, in mtk_dp_train_setting()
1608 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_DOWNSPREAD_CTRL, in mtk_dp_train_setting()
1687 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET, in mtk_dp_train_cr()
1723 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET, in mtk_dp_train_eq()
1732 drm_dp_dpcd_writeb(&mtk_dp->aux, DP_TRAINING_PATTERN_SET, in mtk_dp_train_eq()
1784 ret = drm_dp_dpcd_writeb(&mtk_dp->aux, in mtk_dp_parse_capabilities()
[all …]
/linux-6.15/drivers/gpu/drm/nouveau/
H A Dnouveau_dp.c313 drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr); in nouveau_dp_power_down()
394 drm_dp_dpcd_writeb(aux, DP_LANE_COUNT_SET, tmp); in nouveau_dp_train_link()
427 drm_dp_dpcd_writeb(aux, DP_SET_POWER, pwr); in nouveau_dp_train()
/linux-6.15/drivers/gpu/drm/msm/dp/
H A Ddp_link.c67 len = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in msm_dp_aux_link_power_up()
92 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in msm_dp_aux_link_power_down()
778 ret = drm_dp_dpcd_writeb(link->aux, DP_TEST_RESPONSE, in msm_dp_link_send_test_response()
823 ret = drm_dp_dpcd_writeb(link->aux, DP_TEST_EDID_CHECKSUM, in msm_dp_link_send_edid_checksum()
/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_psr.c761 drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, val); in _panel_replay_enable_sink()
763 drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG2, in _panel_replay_enable_sink()
791 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val); in _psr_enable_sink()
794 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val); in _psr_enable_sink()
815 drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val); in intel_psr_enable_sink_alpm()
828 drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, DP_SET_POWER_D0); in intel_psr_enable_sink()
834 drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG, in intel_psr_panel_replay_enable_sink()
2160 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, 0); in intel_psr_disable_locked()
2163 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_psr_disable_locked()
3444 drm_dp_dpcd_writeb(aux, DP_RECEIVER_ALPM_STATUS, val); in psr_alpm_check()
[all …]
H A Dintel_dp_test.c206 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_EDID_CHECKSUM, in intel_dp_autotest_edid()
395 status = drm_dp_dpcd_writeb(&intel_dp->aux, DP_TEST_RESPONSE, response); in intel_dp_test_request()
H A Dintel_dp_link_training.c741 drm_dp_dpcd_writeb(&intel_dp->aux, DP_LANE_COUNT_SET, lane_count); in intel_dp_link_training_set_bw()
742 drm_dp_dpcd_writeb(&intel_dp->aux, DP_LINK_RATE_SET, rate_select); in intel_dp_link_training_set_bw()
1496 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_TRAINING_PATTERN_SET, in intel_dp_128b132b_lane_cds()
1675 drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_128b132b_sdp_crc16()
H A Dintel_dp_aux_backlight.c355 drm_dp_dpcd_writeb(&intel_dp->aux, INTEL_EDP_HDR_GETSET_CTRL_PARAMS, ctrl) != 1) in intel_dp_aux_hdr_enable_backlight()
535 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_EDP_BACKLIGHT_MODE_SET_REGISTER, in intel_dp_aux_vesa_enable_backlight()
H A Dintel_dp.c3303 return drm_dp_dpcd_writeb(aux, DP_DSC_ENABLE, val); in write_dsc_decompression_flag()
3528 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode); in intel_dp_set_power()
3542 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_SET_POWER, mode); in intel_dp_set_power()
3811 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf); in intel_dp_pcon_set_tmds_mode()
3817 ret = drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf); in intel_dp_pcon_set_tmds_mode()
3969 if (drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_configure_protocol_converter()
4005 if (drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_configure_protocol_converter()
5068 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_PCON_HDMI_LINK_CONFIG_1, buf) < 0) in intel_dp_handle_hdmi_link_status_change()
5312 drm_dp_dpcd_writeb(&intel_dp->aux, DP_DEVICE_SERVICE_IRQ_VECTOR, val); in intel_dp_check_device_service_irq()
5342 if (drm_dp_dpcd_writeb(&intel_dp->aux, in intel_dp_check_link_service_irq()
H A Dintel_ddi.c2307 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_DOWNSPREAD_CTRL, in intel_dp_sink_set_msa_timing_par_ignore_state()
2323 if (drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_CONFIGURATION, in intel_dp_sink_set_fec_ready()
2329 drm_dp_dpcd_writeb(&intel_dp->aux, DP_FEC_STATUS, in intel_dp_sink_set_fec_ready()
/linux-6.15/drivers/gpu/drm/bridge/cadence/
H A Dcdns-mhdp8546-core.c572 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in cdns_mhdp_link_power_up()
611 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); in cdns_mhdp_link_power_down()
882 drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, in cdns_mhdp_link_training_init()
922 drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, in cdns_mhdp_link_training_init()
1063 drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, in cdns_mhdp_link_training_channel_eq()
1321 drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, in cdns_mhdp_link_training()
1352 drm_dp_dpcd_writeb(&mhdp->aux, DP_TRAINING_PATTERN_SET, in cdns_mhdp_link_training()
/linux-6.15/include/drm/display/
H A Ddrm_dp_helper.h554 static inline ssize_t drm_dp_dpcd_writeb(struct drm_dp_aux *aux, in drm_dp_dpcd_writeb() function
/linux-6.15/drivers/gpu/drm/bridge/
H A Dtc358767.c1166 ret = drm_dp_dpcd_writeb(aux, DP_EDP_CONFIGURATION_SET, tmp[0]); in tc_main_link_enable()
1303 ret = drm_dp_dpcd_writeb(aux, DP_TRAINING_PATTERN_SET, tmp[0]); in tc_main_link_enable()
H A Dti-sn65dsi86.c1120 drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET, in ti_sn_bridge_atomic_enable()
/linux-6.15/drivers/gpu/drm/nouveau/dispnv50/
H A Ddisp.c1400 rc = drm_dp_dpcd_writeb(aux, DP_SINK_COUNT_ESI + 1, ack[1]); in nv50_mstm_service()
1439 ret = drm_dp_dpcd_writeb(aux, DP_MSTM_CTRL, 0); in nv50_mstm_detect()

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