Searched refs:dram_type (Results 1 – 14 of 14) sorted by relevance
246 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()262 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()266 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()269 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()272 ast->dram_type = AST_DRAM_8Gx16; in ast_get_dram_info()278 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()282 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()285 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()288 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()299 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()[all …]
296 if (ast->dram_type == AST_DRAM_1Gx16) in ast_init_dram_reg()298 else if (ast->dram_type == AST_DRAM_1Gx32) in ast_init_dram_reg()393 u32 dram_type; member1616 param.dram_type = AST_DDR3; in ast_post_chip_2300()1619 param.dram_type = AST_DDR2; in ast_post_chip_2300()1654 if (param.dram_type == AST_DDR3) { in ast_post_chip_2300()
180 uint32_t dram_type; member
371 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local390 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()393 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()397 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()617 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()642 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()735 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()818 if (dram_type == DRAM_TYPE_LPDDR4) { in tegra210_emc_r21021_set_clock()1006 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()1331 if (dram_type != DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()[all …]
490 enum emc_dram_type dram_type; member629 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()724 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_prepare_timing_change()757 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()766 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()774 if (emc->dram_type == DRAM_TYPE_DDR3) { in tegra_emc_prepare_timing_change()849 if (emc->dram_type == DRAM_TYPE_LPDDR3 && in tegra_emc_complete_timing_change()857 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_complete_timing_change()901 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()910 emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_init()[all …]
527 enum emc_dram_type dram_type; in emc_prepare_timing_change() local572 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_prepare_timing_change()648 if (dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_ON) { in emc_prepare_timing_change()701 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()731 if (dram_type == DRAM_TYPE_DDR3) in emc_prepare_timing_change()736 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()1120 enum emc_dram_type dram_type; in emc_setup_hw() local1125 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_setup_hw()1133 switch (dram_type) { in emc_setup_hw()1159 switch (dram_type) { in emc_setup_hw()[all …]
598 enum emc_dram_type dram_type; in emc_setup_hw() local638 dram_type = FIELD_GET(EMC_FBIO_CFG5_DRAM_TYPE, emc_fbio); in emc_setup_hw()640 switch (dram_type) { in emc_setup_hw()662 if (dram_type == DRAM_TYPE_LPDDR2) { in emc_setup_hw()
772 if ((emc->dram_type != DRAM_TYPE_LPDDR2 && in tegra210_emc_set_refresh()773 emc->dram_type != DRAM_TYPE_LPDDR4) || in tegra210_emc_set_refresh()1774 emc->dram_type = value & 0x3; in tegra210_emc_detect()
908 unsigned int dram_type; member
46 static int dram_type; variable53 switch (dram_type) { in mt7620_dram_init()79 switch (dram_type) { in mt7628_dram_init()233 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()235 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()237 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()238 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
1548 umc->dram_type = MEM_EMPTY; in umc_determine_memory_type()1560 umc->dram_type = MEM_RDDR5; in umc_determine_memory_type()1562 umc->dram_type = MEM_DDR5; in umc_determine_memory_type()1567 umc->dram_type = MEM_RDDR4; in umc_determine_memory_type()1569 umc->dram_type = MEM_DDR4; in umc_determine_memory_type()1612 pvt->dram_type = MEM_DDR4; in dct_determine_memory_type()1614 pvt->dram_type = MEM_DDR3; in dct_determine_memory_type()1616 pvt->dram_type = MEM_LRDDR3; in dct_determine_memory_type()1618 pvt->dram_type = MEM_RDDR3; in dct_determine_memory_type()1627 pvt->dram_type = MEM_EMPTY; in dct_determine_memory_type()[all …]
234 u32 nr_pages, dram_type; in init_csrows() local265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()268 dimm->mtype = dram_type; in init_csrows()
311 enum mem_type dram_type; member380 enum mem_type dram_type; member
63 int dram_type; member430 dvfsrc->dram_type = ares.a1; in mtk_dvfsrc_probe()431 dev_dbg(&pdev->dev, "DRAM Type: %d\n", dvfsrc->dram_type); in mtk_dvfsrc_probe()433 dvfsrc->curr_opps = &dvfsrc->dvd->opps_desc[dvfsrc->dram_type]; in mtk_dvfsrc_probe()