Searched refs:dram_bw_table (Results 1 – 5 of 5) sorted by relevance
93 min_table->dram_bw_table.entries[i].min_dcfclk_khz = in build_min_clk_table_fine_grained()94 min_table->dram_bw_table.entries[i].min_fclk_khz * in build_min_clk_table_fine_grained()97 min_table->dram_bw_table.entries[i].min_dcfclk_khz = in build_min_clk_table_fine_grained()109 min_table->dram_bw_table.num_entries = i; in build_min_clk_table_fine_grained()116 …if (min_table->dram_bw_table.entries[i].min_dcfclk_khz == min_table->dram_bw_table.entries[i + 1].… in build_min_clk_table_fine_grained()117 …min_table->dram_bw_table.entries[i].min_fclk_khz == min_table->dram_bw_table.entries[i + 1].min_fc… in build_min_clk_table_fine_grained()118 …min_table->dram_bw_table.entries[i].pre_derate_dram_bw_kbps == min_table->dram_bw_table.entries[i … in build_min_clk_table_fine_grained()122 …min_table->dram_bw_table.entries[j].min_dcfclk_khz = min_table->dram_bw_table.entries[j + 1].min_d… in build_min_clk_table_fine_grained()123 …min_table->dram_bw_table.entries[j].min_fclk_khz = min_table->dram_bw_table.entries[j + 1].min_fcl… in build_min_clk_table_fine_grained()124 …min_table->dram_bw_table.entries[j].pre_derate_dram_bw_kbps = min_table->dram_bw_table.entries[j +… in build_min_clk_table_fine_grained()[all …]
34 *dcfclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_dcfclk_khz; in get_minimum_clocks_for_latency()35 *fclk = in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_latency].min_fclk_khz; in get_minimum_clocks_for_latency()36 …*uclk = dram_bw_kbps_to_uclk_khz(in_out->min_clk_table->dram_bw_table.entries[min_clock_index_for_… in get_minimum_clocks_for_latency()
48 struct dml2_mcg_dram_bw_to_min_clk_table dram_bw_table; member
15 …out->stage1.min_clk_index_for_latency = dml->min_clk_table.dram_bw_table.num_entries - 1; //dml->m… in setup_unoptimized_display_config_with_meta()1164 pmo_init_params.mcg_clock_table_size = dml->min_clk_table.dram_bw_table.num_entries; in dml2_top_soc15_initialize_instance()
7373 …mode_lib->ms.DCFCLK = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_index].… in dml_core_mode_support()7374 …mode_lib->ms.FabricClock = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_in… in dml_core_mode_support()7380 …mode_lib->ms.uclk_freq_mhz = dram_bw_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out_… in dml_core_mode_support()7381 …mode_lib->ms.dram_bw_mbps = ((double)min_clk_table->dram_bw_table.entries[in_out_params->min_clk_i… in dml_core_mode_support()7382 …lib->ms.max_dram_bw_mbps = ((double)min_clk_table->dram_bw_table.entries[min_clk_table->dram_bw_ta… in dml_core_mode_support()10421 …double hard_minimum_dcfclk_mhz = (double)min_clk_table->dram_bw_table.entries[0].min_dcfclk_khz / … in dml_core_mode_programming()10515 …dml2_printf("DML::%s: min_clk_table min_fclk_khz = %d\n", __func__, min_clk_table->dram_bw_table.e… in dml_core_mode_programming()10516 …e uclk_mhz = %f\n", __func__, dram_bw_kbps_to_uclk_mhz(min_clk_table->dram_bw_table.entries[in_out… in dml_core_mode_programming()