Searched refs:dpm_clks (Results 1 – 12 of 12) sorted by relevance
1200 smu_dpm_clks_a->dpm_clks == NULL || smu_dpm_clks_b->dpm_clks == NULL) in translate_to_DpmClocks_t_dcn35()1204 smu_dpm_clks_b->dpm_clks->DcfClocks[i] = smu_dpm_clks_a->dpm_clks->DcfClocks[i]; in translate_to_DpmClocks_t_dcn35()1207 smu_dpm_clks_b->dpm_clks->DispClocks[i] = smu_dpm_clks_a->dpm_clks->DispClocks[i]; in translate_to_DpmClocks_t_dcn35()1210 smu_dpm_clks_b->dpm_clks->DppClocks[i] = smu_dpm_clks_a->dpm_clks->DppClocks[i]; in translate_to_DpmClocks_t_dcn35()1226 smu_dpm_clks_b->dpm_clks->MaxGfxClk = smu_dpm_clks_a->dpm_clks->MaxGfxClk; in translate_to_DpmClocks_t_dcn35()1227 smu_dpm_clks_b->dpm_clks->MinGfxClk = smu_dpm_clks_a->dpm_clks->MinGfxClk; in translate_to_DpmClocks_t_dcn35()1240 smu_dpm_clks_b->dpm_clks->SocClocks[i] = smu_dpm_clks_a->dpm_clks->SocClocks[i]; in translate_to_DpmClocks_t_dcn35()1241 smu_dpm_clks_b->dpm_clks->SocVoltage[i] = smu_dpm_clks_a->dpm_clks->SocVoltage[i]; in translate_to_DpmClocks_t_dcn35()1292 ASSERT(smu_dpm_clks.dpm_clks); in dcn35_clk_mgr_construct()1391 smu_dpm_clks.dpm_clks); in dcn35_clk_mgr_construct()[all …]
175 DpmClocks_t_dcn35 *dpm_clks; member180 DpmClocks_t_dcn351 *dpm_clks; member
503 DpmClocks_t *table = smu_dpm_clks->dpm_clks; in dcn31_get_dpm_table_from_smu()713 if (smu_dpm_clks.dpm_clks == NULL) { in dcn31_clk_mgr_construct()714 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn31_clk_mgr_construct()718 ASSERT(smu_dpm_clks.dpm_clks); in dcn31_clk_mgr_construct()762 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn31_clk_mgr_construct()763 smu_dpm_clks.dpm_clks->MaxGfxClk); in dcn31_clk_mgr_construct()767 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn31_clk_mgr_construct()771 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn31_clk_mgr_construct()775 i, smu_dpm_clks.dpm_clks->SocClocks[i]); in dcn31_clk_mgr_construct()793 smu_dpm_clks.dpm_clks); in dcn31_clk_mgr_construct()[all …]
237 DpmClocks_t *dpm_clks; member
464 DpmClocks_315_t *table = smu_dpm_clks->dpm_clks; in dcn315_get_dpm_table_from_smu()644 if (smu_dpm_clks.dpm_clks == NULL) { in dcn315_clk_mgr_construct()645 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn315_clk_mgr_construct()649 ASSERT(smu_dpm_clks.dpm_clks); in dcn315_clk_mgr_construct()689 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn315_clk_mgr_construct()690 smu_dpm_clks.dpm_clks->MaxGfxClk); in dcn315_clk_mgr_construct()694 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn315_clk_mgr_construct()698 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn315_clk_mgr_construct()702 i, smu_dpm_clks.dpm_clks->SocClocks[i]); in dcn315_clk_mgr_construct()721 smu_dpm_clks.dpm_clks); in dcn315_clk_mgr_construct()[all …]
95 DpmClocks_315_t *dpm_clks; member
567 DpmClocks314_t *table = smu_dpm_clks->dpm_clks; in dcn314_get_dpm_table_from_smu()823 if (smu_dpm_clks.dpm_clks == NULL) { in dcn314_clk_mgr_construct()824 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn314_clk_mgr_construct()828 ASSERT(smu_dpm_clks.dpm_clks); in dcn314_clk_mgr_construct()871 smu_dpm_clks.dpm_clks->MinGfxClk, in dcn314_clk_mgr_construct()872 smu_dpm_clks.dpm_clks->MaxGfxClk); in dcn314_clk_mgr_construct()876 smu_dpm_clks.dpm_clks->DcfClocks[i]); in dcn314_clk_mgr_construct()880 i, smu_dpm_clks.dpm_clks->DispClocks[i]); in dcn314_clk_mgr_construct()884 i, smu_dpm_clks.dpm_clks->SocClocks[i]); in dcn314_clk_mgr_construct()903 smu_dpm_clks.dpm_clks); in dcn314_clk_mgr_construct()[all …]
77 DpmClocks314_t *dpm_clks; member
429 DpmClocks_316_t *table = smu_dpm_clks->dpm_clks; in dcn316_get_dpm_table_from_smu()612 smu_dpm_clks.dpm_clks = (DpmClocks_316_t *)dm_helpers_allocate_gpu_mem( in dcn316_clk_mgr_construct()618 if (smu_dpm_clks.dpm_clks == NULL) { in dcn316_clk_mgr_construct()619 smu_dpm_clks.dpm_clks = &dummy_clocks; in dcn316_clk_mgr_construct()623 ASSERT(smu_dpm_clks.dpm_clks); in dcn316_clk_mgr_construct()664 smu_dpm_clks.dpm_clks); in dcn316_clk_mgr_construct()668 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in dcn316_clk_mgr_construct()670 smu_dpm_clks.dpm_clks); in dcn316_clk_mgr_construct()
103 DpmClocks_316_t *dpm_clks; member
644 struct vg_dpm_clocks *table = smu_dpm_clks->dpm_clks; in vg_get_dpm_table_from_smu()695 smu_dpm_clks.dpm_clks = (struct vg_dpm_clocks *)dm_helpers_allocate_gpu_mem( in vg_clk_mgr_construct()701 if (smu_dpm_clks.dpm_clks == NULL) { in vg_clk_mgr_construct()702 smu_dpm_clks.dpm_clks = &dummy_clocks; in vg_clk_mgr_construct()706 ASSERT(smu_dpm_clks.dpm_clks); in vg_clk_mgr_construct()738 smu_dpm_clks.dpm_clks); in vg_clk_mgr_construct()741 if (smu_dpm_clks.dpm_clks && smu_dpm_clks.mc_address.quad_part != 0) in vg_clk_mgr_construct()743 smu_dpm_clks.dpm_clks); in vg_clk_mgr_construct()
125 struct vg_dpm_clocks *dpm_clks; member