Searched refs:dpll_md (Results 1 – 8 of 8) sorted by relevance
97 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local112 dpll_md = REG_READ(dpll_md_reg); in cdv_intel_crt_mode_set()114 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); in cdv_intel_crt_mode_set()
504 .dpll_md = DPLL_A_MD,529 .dpll_md = DPLL_B_MD,
228 u32 dpll_md; member262 u32 dpll_md; member
780 …REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_U… in cdv_intel_crtc_mode_set()
405 hw_state->dpll_md = tmp; in i9xx_dpll_get_hw_state()1093 hw_state->dpll_md = i965_dpll_md(crtc_state); in i9xx_compute_dpll()1455 hw_state->dpll_md = i965_dpll_md(crtc_state); in vlv_compute_dpll()1481 hw_state->dpll_md = i965_dpll_md(crtc_state); in chv_compute_dpll()1870 hw_state->dpll_md); in i9xx_enable_pll()2041 intel_de_write(dev_priv, DPLL_MD(dev_priv, pipe), hw_state->dpll_md); in vlv_enable_pll()2197 hw_state->dpll_md); in chv_enable_pll()2199 dev_priv->display.state.chv_dpll_md[pipe] = hw_state->dpll_md; in chv_enable_pll()2210 hw_state->dpll_md); in chv_enable_pll()
185 u32 dpll_md; member
654 hw_state->dpll_md, in ibx_dump_hw_state()666 a->dpll_md == b->dpll_md && in ibx_compare_hw_state()
3050 tmp = pipe_config->dpll_hw_state.i9xx.dpll_md; in i9xx_get_pipe_config()