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Searched refs:dpio_phy (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/i915/display/
H A Dintel_dpio_phy.h23 enum dpio_phy { enum
31 enum dpio_phy *phy, enum dpio_channel *ch);
34 void bxt_dpio_phy_init(struct intel_display *display, enum dpio_phy phy);
37 enum dpio_phy phy);
39 enum dpio_phy phy);
46 enum dpio_phy vlv_dig_port_to_phy(struct intel_digital_port *dig_port);
47 enum dpio_phy vlv_pipe_to_phy(enum pipe pipe);
79 enum dpio_phy *phy, enum dpio_channel *ch) in bxt_port_to_phy_channel()
93 enum dpio_phy phy) in bxt_dpio_phy_is_enabled()
98 enum dpio_phy phy) in bxt_dpio_phy_verify_state()
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H A Dintel_dpio_phy.c142 enum dpio_phy rcomp_phy;
247 enum dpio_phy *phy, enum dpio_channel *ch) in bxt_port_to_phy_channel()
301 enum dpio_phy phy; in bxt_dpio_phy_set_signal_levels()
356 enum dpio_phy phy) in bxt_dpio_phy_is_enabled()
391 enum dpio_phy phy) in bxt_phy_wait_grc_done()
491 enum dpio_phy rcomp_phy = phy_info->rcomp_phy; in bxt_dpio_phy_init()
541 enum dpio_phy phy) in bxt_dpio_phy_verify_state()
618 enum dpio_phy phy; in bxt_dpio_phy_set_lane_optim_mask()
640 enum dpio_phy phy; in bxt_dpio_phy_get_lane_lat_optim_mask()
687 enum dpio_phy vlv_pipe_to_phy(enum pipe pipe) in vlv_pipe_to_phy()
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H A Dintel_display_power_well.h75 enum dpio_phy phy;
154 bool chv_phy_powergate_ch(struct intel_display *display, enum dpio_phy phy,
H A Dintel_display_power_well.c1436 enum dpio_phy phy; in chv_dpio_cmn_power_well_enable()
1498 enum dpio_phy phy; in chv_dpio_cmn_power_well_disable()
1529 static void assert_chv_phy_powergate(struct intel_display *display, enum dpio_phy phy, in assert_chv_phy_powergate()
1594 bool chv_phy_powergate_ch(struct intel_display *display, enum dpio_phy phy, in chv_phy_powergate_ch()
1632 enum dpio_phy phy = vlv_dig_port_to_phy(enc_to_dig_port(encoder)); in chv_phy_powergate_lanes()
H A Dintel_dpll.c519 enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe); in vlv_crtc_clock_get()
547 enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe); in chv_crtc_clock_get()
1889 enum dpio_phy phy, enum dpio_channel ch) in vlv_pllb_recal_opamp()
1923 enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe); in vlv_prepare_pll()
2051 enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe); in chv_prepare_pll()
2140 enum dpio_phy phy = vlv_pipe_to_phy(crtc->pipe); in _chv_enable_pll()
2275 enum dpio_phy phy = vlv_pipe_to_phy(pipe); in chv_disable_pll()
H A Dintel_pps.c98 enum dpio_phy phy = vlv_pipe_to_phy(pipe); in vlv_power_sequencer_kick()
H A Dintel_dpll_mgr.c2046 enum dpio_phy phy = DPIO_PHY0; in bxt_ddi_pll_enable()
2169 enum dpio_phy phy; in bxt_ddi_pll_get_hw_state()
/linux-6.15/drivers/gpu/drm/i915/
H A Dvlv_sideband.h14 enum dpio_phy;
78 u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg);
80 enum dpio_phy phy, int reg, u32 val);
H A Dvlv_sideband.c200 static u32 vlv_dpio_phy_iosf_port(struct drm_i915_private *i915, enum dpio_phy phy) in vlv_dpio_phy_iosf_port()
212 u32 vlv_dpio_read(struct drm_i915_private *i915, enum dpio_phy phy, int reg) in vlv_dpio_read()
231 enum dpio_phy phy, int reg, u32 val) in vlv_dpio_write()
/linux-6.15/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c548 enum dpio_phy phy = DPIO_PHY0; in bxt_vgpu_get_dp_bitrate()