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Searched refs:dpcd_lane_status (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/link/protocols/
H A Dlink_dp_training_8b_10b.c187 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in perform_8b_10b_clock_recovery_sequence() local
194 memset(&dpcd_lane_status, '\0', sizeof(dpcd_lane_status)); in perform_8b_10b_clock_recovery_sequence()
245 dpcd_lane_status, in perform_8b_10b_clock_recovery_sequence()
254 if (dp_is_cr_done(lane_count, dpcd_lane_status)) { in perform_8b_10b_clock_recovery_sequence()
293 return dp_get_cr_failure(lane_count, dpcd_lane_status); in perform_8b_10b_clock_recovery_sequence()
308 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in perform_8b_10b_channel_equalization_sequence() local
350 dpcd_lane_status, in perform_8b_10b_channel_equalization_sequence()
359 if (!dp_is_cr_done(lane_count, dpcd_lane_status)) in perform_8b_10b_channel_equalization_sequence()
360 return dpcd_lane_status[0].bits.CR_DONE_0 ? in perform_8b_10b_channel_equalization_sequence()
365 if (dp_is_ch_eq_done(lane_count, dpcd_lane_status) && in perform_8b_10b_channel_equalization_sequence()
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H A Dlink_dp_training_dpia.c394 dpcd_lane_status, in dpia_training_cr_non_transparent()
404 if (dp_is_cr_done(lane_count, dpcd_lane_status)) { in dpia_training_cr_non_transparent()
410 result = dp_get_cr_failure(lane_count, dpcd_lane_status); in dpia_training_cr_non_transparent()
498 dpcd_lane_status, in dpia_training_cr_transparent()
508 if (dp_is_cr_done(lane_count, dpcd_lane_status)) { in dpia_training_cr_transparent()
678 dpcd_lane_status, in dpia_training_eq_non_transparent()
688 if (!dp_is_cr_done(lane_count, dpcd_lane_status)) { in dpia_training_eq_non_transparent()
693 if (dp_is_ch_eq_done(lane_count, dpcd_lane_status) && in dpia_training_eq_non_transparent()
761 dpcd_lane_status, in dpia_training_eq_transparent()
771 if (!dp_is_cr_done(lane_count, dpcd_lane_status)) { in dpia_training_eq_transparent()
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H A Dlink_dp_training_128b_132b.c80 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_channel_eq_done_sequence() local
93 dp_get_lane_status_and_lane_adjust(link, lt_settings, dpcd_lane_status, in dp_perform_128b_132b_channel_eq_done_sequence()
111 status = dp_get_lane_status_and_lane_adjust(link, lt_settings, dpcd_lane_status, in dp_perform_128b_132b_channel_eq_done_sequence()
119 dpcd_lane_status)) { in dp_perform_128b_132b_channel_eq_done_sequence()
148 status = dp_get_lane_status_and_lane_adjust(link, lt_settings, dpcd_lane_status, in dp_perform_128b_132b_channel_eq_done_sequence()
165 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_128b_132b_cds_done_sequence() local
177 status = dp_get_lane_status_and_lane_adjust(link, lt_settings, dpcd_lane_status, in dp_perform_128b_132b_cds_done_sequence()
181 } else if (dp_is_symbol_locked(lt_settings->link_settings.lane_count, dpcd_lane_status) && in dp_perform_128b_132b_cds_done_sequence()
H A Dlink_dp_training_fixed_vs_pe_retimer.c327 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in dp_perform_fixed_vs_pe_training_sequence() local
335 memset(&dpcd_lane_status, '\0', sizeof(dpcd_lane_status)); in dp_perform_fixed_vs_pe_training_sequence()
409 dpcd_lane_status, in dp_perform_fixed_vs_pe_training_sequence()
415 if (dp_is_cr_done(lane_count, dpcd_lane_status)) { in dp_perform_fixed_vs_pe_training_sequence()
447 status = dp_get_cr_failure(lane_count, dpcd_lane_status); in dp_perform_fixed_vs_pe_training_sequence()
457 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX] = {0}; in dp_perform_fixed_vs_pe_training_sequence() local
527 dpcd_lane_status, in dp_perform_fixed_vs_pe_training_sequence()
533 if (!dp_is_cr_done(lane_count, dpcd_lane_status)) { in dp_perform_fixed_vs_pe_training_sequence()
539 if (dp_is_ch_eq_done(lane_count, dpcd_lane_status) && in dp_perform_fixed_vs_pe_training_sequence()
540 dp_is_symbol_locked(lane_count, dpcd_lane_status) && in dp_perform_fixed_vs_pe_training_sequence()
H A Dlink_dp_training.h141 union lane_status *dpcd_lane_status);
144 union lane_status *dpcd_lane_status);
146 union lane_status *dpcd_lane_status);
157 union lane_status *dpcd_lane_status);
H A Dlink_dp_training.c442 union lane_status *dpcd_lane_status) in dp_get_cr_failure() argument
478 union lane_status *dpcd_lane_status) in dp_is_cr_done() argument
484 if (!dpcd_lane_status[lane].bits.CR_DONE_0) in dp_is_cr_done()
492 union lane_status *dpcd_lane_status) in dp_is_ch_eq_done() argument
497 if (!dpcd_lane_status[lane].bits.CHANNEL_EQ_DONE_0) in dp_is_ch_eq_done()
503 union lane_status *dpcd_lane_status) in dp_is_symbol_locked() argument
508 if (!dpcd_lane_status[lane].bits.SYMBOL_LOCKED_0) in dp_is_symbol_locked()
1445 dpcd_lane_status, in perform_post_lt_adj_req_sequence()
1454 if (!dp_is_cr_done(lane_count, dpcd_lane_status)) in perform_post_lt_adj_req_sequence()
1457 if (!dp_is_ch_eq_done(lane_count, dpcd_lane_status) || in perform_post_lt_adj_req_sequence()
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/linux-6.15/drivers/gpu/drm/amd/display/dc/link/
H A Dlink_dpms.c1208 union lane_status dpcd_lane_status[LANE_COUNT_DP_MAX]; in poll_for_allocation_change_trigger() local
1215 get_lane_status(link, link->cur_link_settings.lane_count, dpcd_lane_status, &lane_status_updated); in poll_for_allocation_change_trigger()
1217 if (!dp_is_cr_done(link->cur_link_settings.lane_count, dpcd_lane_status) || in poll_for_allocation_change_trigger()
1218 !dp_is_ch_eq_done(link->cur_link_settings.lane_count, dpcd_lane_status) || in poll_for_allocation_change_trigger()
1219 !dp_is_symbol_locked(link->cur_link_settings.lane_count, dpcd_lane_status) || in poll_for_allocation_change_trigger()