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Searched refs:dml2_core_internal_bw_max (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_core/
H A Ddml2_core_shared_types.h157 dml2_core_internal_bw_max enumerator
309 double avg_bandwidth_required[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max];
318 bool avg_bandwidth_support_ok[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max];
902 double dummy_bw[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max];
1001 double dummy_bw[dml2_core_internal_soc_state_max][dml2_core_internal_bw_max];
2017 double (*urg_vactive_bandwidth_required)[dml2_core_internal_bw_max];
2018 double (*urg_bandwidth_required)[dml2_core_internal_bw_max];
2019 double (*urg_bandwidth_required_qual)[dml2_core_internal_bw_max];
2020 double (*non_urg_bandwidth_required)[dml2_core_internal_bw_max];
2021 double (*surface_avg_vactive_required_bw)[dml2_core_internal_bw_max][DML2_MAX_PLANES];
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H A Ddml2_core_utils.c21 case (dml2_core_internal_bw_max): in dml2_core_utils_internal_bw_type_str()
H A Ddml2_core_dcn4_calcs.c27 case (dml2_core_internal_bw_max): in dml2_core_internal_bw_type_str()
2816 for (n = 0; n < dml2_core_internal_bw_max; n++) { in calculate_bandwidth_available()
2874 for (n = 0; n < dml2_core_internal_bw_max; n++) { // sdp, dram in calculate_avg_bandwidth_required()
6163 for (n = 0; n < dml2_core_internal_bw_max; n++) { in calculate_peak_bandwidth_required()
6427 for (unsigned int n = 0; n < dml2_core_internal_bw_max; n++) { in check_urgent_bandwidth_support()
6477 for (unsigned int n = 0; n < dml2_core_internal_bw_max; n++) { // check sdp and dram in calculate_immediate_flip_bandwidth_support()
6501 for (unsigned int n = 0; n < dml2_core_internal_bw_max; n++) { in calculate_immediate_flip_bandwidth_support()
7055 double (*surface_peak_required_bw)[dml2_core_internal_bw_max][DML2_MAX_PLANES], in calculate_vactive_det_fill_latency()
7073 for (bw_type = 0; bw_type < dml2_core_internal_bw_max; bw_type++) { in calculate_vactive_det_fill_latency()
8861 for (m = 0; m < dml2_core_internal_bw_max; m++) { // check sdp and dram in dml_core_mode_support()
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