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Searched refs:dmar_writeq (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/iommu/intel/
H A Dprq.c263 dmar_writeq(iommu->reg + DMAR_PQH_REG, tail); in prq_event_thread()
328 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL); in intel_iommu_enable_prq()
329 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL); in intel_iommu_enable_prq()
330 dmar_writeq(iommu->reg + DMAR_PQA_REG, virt_to_phys(iommu->prq) | PRQ_ORDER); in intel_iommu_enable_prq()
351 dmar_writeq(iommu->reg + DMAR_PQH_REG, 0ULL); in intel_iommu_finish_prq()
352 dmar_writeq(iommu->reg + DMAR_PQT_REG, 0ULL); in intel_iommu_finish_prq()
353 dmar_writeq(iommu->reg + DMAR_PQA_REG, 0ULL); in intel_iommu_finish_prq()
H A Dperfmon.c414 dmar_writeq(iommu_config_base(iommu_pmu, idx), hwc->config); in iommu_pmu_assign_event()
513 dmar_writeq(iommu_pmu->overflow, status); in iommu_pmu_counter_overflow()
H A Diommu.c1011 dmar_writeq(iommu->reg + DMAR_RTADDR_REG, addr); in iommu_set_root_entry()
1079 dmar_writeq(iommu->reg + DMAR_CCMD_REG, val); in __iommu_flush_context()
1120 dmar_writeq(iommu->reg + tlb_offset, val_iva); in __iommu_flush_iotlb()
1121 dmar_writeq(iommu->reg + tlb_offset + 8, val); in __iommu_flush_iotlb()
4698 dmar_writeq(iommu->reg + DMAR_ECEO_REG, ob); in ecmd_submit_sync()
4699 dmar_writeq(iommu->reg + DMAR_ECMD_REG, ecmd | (oa << DMA_ECMD_OA_SHIFT)); in ecmd_submit_sync()
H A Diommu.h153 #define dmar_writeq(a,v) writeq(v,a) macro
H A Dirq_remapping.c467 dmar_writeq(iommu->reg + DMAR_IRTA_REG, in iommu_set_irq_remapping()
H A Ddmar.c1664 dmar_writeq(iommu->reg + DMAR_IQA_REG, val); in __dmar_enable_qi()