Searched refs:dep_mclk_table (Results 1 – 2 of 2) sorted by relevance
918 dep_mclk_table->entries[i].clk) { in smu7_setup_dpm_tables_v1()920 dep_mclk_table->entries[i].clk; in smu7_setup_dpm_tables_v1()2522 if (lookup_table->entries[dep_mclk_table->entries[dep_mclk_table->count-1].vddInd].us_vdd >= 1000) in smu7_patch_voltage_workaround()2527 dep_mclk_table->entries[dep_mclk_table->count-1].vddInd = (uint8_t) i; in smu7_patch_voltage_workaround()3711 if (dep_mclk_table != NULL && dep_mclk_table->count == 1) { in smu7_get_pp_table_entry_v1()3712 if (dep_mclk_table->entries[0].clk != in smu7_get_pp_table_entry_v1()3859 if (dep_mclk_table != NULL && dep_mclk_table->count == 1) { in smu7_get_pp_table_entry_v0()3860 if (dep_mclk_table->entries[0].clk != in smu7_get_pp_table_entry_v0()3864 if (dep_mclk_table->entries[0].v != in smu7_get_pp_table_entry_v0()5226 dep_mclk_table->entries[i].clk); in smu7_get_mclks()[all …]
1319 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = in vega10_setup_default_dpm_tables() local1346 PP_ASSERT_WITH_CODE(dep_mclk_table, in vega10_setup_default_dpm_tables()1349 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in vega10_setup_default_dpm_tables()1375 dep_mclk_table); in vega10_setup_default_dpm_tables()