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Searched refs:ddrc (Results 1 – 25 of 45) sorted by relevance

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/linux-6.15/Documentation/devicetree/bindings/memory-controllers/fsl/
H A Dimx8m-ddrc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/fsl/imx8m-ddrc.yaml#
28 - fsl,imx8mn-ddrc
29 - fsl,imx8mm-ddrc
30 - fsl,imx8mq-ddrc
31 - const: fsl,imx8m-ddrc
37 This is not currently mapped by the imx8m-ddrc driver.
64 ddrc: memory-controller@3d400000 {
65 compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
/linux-6.15/Documentation/devicetree/bindings/interconnect/
H A Dfsl,imx8m-noc.yaml53 fsl,ddrc:
81 fsl,ddrc = <&ddrc>;
96 ddrc: memory-controller@3d400000 {
97 compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
/linux-6.15/Documentation/devicetree/bindings/memory-controllers/
H A Dsnps,dw-umctl2-ddrc.yaml4 $id: http://devicetree.org/schemas/memory-controllers/snps,dw-umctl2-ddrc.yaml#
28 const: snps,ddrc-3.80a
30 const: snps,dw-umctl2-ddrc
32 const: xlnx,zynqmp-ddrc-2.40a
96 compatible = "xlnx,zynqmp-ddrc-2.40a";
107 compatible = "snps,dw-umctl2-ddrc";
H A Dxlnx,zynq-ddrc-a05.yaml4 $id: http://devicetree.org/schemas/memory-controllers/xlnx,zynq-ddrc-a05.yaml#
20 const: xlnx,zynq-ddrc-a05
34 compatible = "xlnx,zynq-ddrc-a05";
/linux-6.15/drivers/power/reset/
H A Dat91-sama5d2_shdwc.c89 struct ddrc_reg_config ddrc; member
271 .ddrc = {
288 .ddrc = {
388 if (at91_shdwc->rcfg->ddrc.type_mask) { in at91_shdwc_probe()
405 at91_shdwc->rcfg->ddrc.type_offset) & in at91_shdwc_probe()
406 at91_shdwc->rcfg->ddrc.type_mask; in at91_shdwc_probe()
/linux-6.15/drivers/devfreq/
H A DMakefile13 obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o
/linux-6.15/arch/mips/include/asm/mach-rc32434/
H A Dddr.h40 u32 ddrc; member
/linux-6.15/arch/arm64/boot/dts/freescale/
H A Dimx8mm-evk.dts20 &ddrc {
H A Dimx8mn-ddr4-evk.dts32 &ddrc {
H A Dimx8mm-kontron-sl.dtsi43 &ddrc {
H A Dimx8mq.dtsi1577 fsl,ddrc = <&ddrc>;
1867 ddrc: memory-controller@3d400000 { label
1868 compatible = "fsl,imx8mq-ddrc", "fsl,imx8m-ddrc";
H A Dimx8mm-beacon-som.dtsi46 &ddrc {
H A Dimx8mm-phycore-som.dtsi50 &ddrc {
H A Dimx8mn-beacon-som.dtsi54 &ddrc {
H A Dimx8mm-innocomm-wb15.dtsi38 &ddrc {
H A Dimx8mm-venice-gw700x.dtsi84 &ddrc {
H A Dimx8mn.dtsi1302 ddrc: memory-controller@3d400000 { label
1303 compatible = "fsl,imx8mn-ddrc", "fsl,imx8m-ddrc";
H A Dimx8mm-var-som.dtsi49 &ddrc {
H A Dimx8mm.dtsi1477 ddrc: memory-controller@3d400000 { label
1478 compatible = "fsl,imx8mm-ddrc", "fsl,imx8m-ddrc";
H A Dimx8mq-evk.dts174 &ddrc {
/linux-6.15/arch/arm64/boot/dts/intel/
H A Dsocfpga_n5x_socdk.dts30 compatible = "snps,ddrc-3.80a";
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra20-pinmux.yaml47 ck32, ddrc, pmca, pmcb, pmcc, pmcd, pmce, xm2c, xm2d, ls,
/linux-6.15/Documentation/admin-guide/perf/
H A Dhisi-pmu.rst23 /sys/bus/event_source/devices/hisi_sccl{X}_<l3c{Y}/hha{Y}/ddrc{Y}>.
/linux-6.15/arch/arm/boot/dts/nvidia/
H A Dtegra20-trimslice.dts220 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
H A Dtegra20-tamonten.dtsi195 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",

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