Home
last modified time | relevance | path

Searched refs:dcn3_15_soc (Results 1 – 1 of 1) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c265 static struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = { variable
679 dcn3_15_soc.num_chans = bw_params->num_channels; in dcn315_update_bw_bounding_box()
694 dcn3_15_soc.clock_limits[i].state = i; in dcn315_update_bw_bounding_box()
697 dcn3_15_soc.clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; in dcn315_update_bw_bounding_box()
699 dcn3_15_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in dcn315_update_bw_bounding_box()
708 dcn3_15_soc.clock_limits[i].dispclk_mhz = max_dispclk_mhz; in dcn315_update_bw_bounding_box()
709 dcn3_15_soc.clock_limits[i].dppclk_mhz = max_dppclk_mhz; in dcn315_update_bw_bounding_box()
710 dcn3_15_soc.clock_limits[i].dscclk_mhz = max_dispclk_mhz / 3.0; in dcn315_update_bw_bounding_box()
712 dcn3_15_soc.num_states = clk_table->num_entries; in dcn315_update_bw_bounding_box()
718 dcn3_15_soc.dispclk_dppclk_vco_speed_mhz = max_dispclk_mhz * 2; in dcn315_update_bw_bounding_box()
[all …]