Searched refs:cx0pll (Results 1 – 5 of 5) sorted by relevance
2085 &crtc_state->dpll_hw_state.cx0pll); in intel_c10pll_calc_state()2091 intel_snps_hdmi_pll_compute_c10pll(&crtc_state->dpll_hw_state.cx0pll.c10, in intel_c10pll_calc_state()2094 &crtc_state->dpll_hw_state.cx0pll); in intel_c10pll_calc_state()2095 crtc_state->dpll_hw_state.cx0pll.use_c10 = true; in intel_c10pll_calc_state()2233 struct intel_c20pll_state *pll_state = &crtc_state->dpll_hw_state.cx0pll.c20; in intel_c20_compute_hdmi_tmds_pll()2347 crtc_state->dpll_hw_state.cx0pll.c20 = *tables[i]; in intel_c20pll_calc_state()2349 &crtc_state->dpll_hw_state.cx0pll, in intel_c20pll_calc_state()2351 crtc_state->dpll_hw_state.cx0pll.use_c10 = false; in intel_c20pll_calc_state()3088 __intel_cx0pll_enable(encoder, &crtc_state->dpll_hw_state.cx0pll, in intel_cx0pll_enable()3383 const struct intel_c10pll_state *mpllb_sw_state = &state->dpll_hw_state.cx0pll.c10; in intel_c10pll_state_verify()[all …]
278 struct intel_cx0pll_state cx0pll; member
4232 intel_cx0pll_readout_hw_state(encoder, &crtc_state->dpll_hw_state.cx0pll); in mtl_ddi_get_config()4234 if (crtc_state->dpll_hw_state.cx0pll.tbt_mode) in mtl_ddi_get_config()4237 crtc_state->port_clock = intel_cx0pll_calc_port_clock(encoder, &crtc_state->dpll_hw_state.cx0pll); in mtl_ddi_get_config()
1234 crtc_state->port_clock = intel_cx0pll_calc_port_clock(encoder, &crtc_state->dpll_hw_state.cx0pll); in mtl_crtc_compute_clock()
5309 PIPE_CONF_CHECK_PLL_CX0(dpll_hw_state.cx0pll); in intel_pipe_config_compare()