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Searched refs:cw0 (Results 1 – 14 of 14) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/display/dmub/src/
H A Ddmub_dcn30.c88 const struct dmub_window *cw0, in dmub_dcn30_backdoor_load() argument
100 dmub_dcn30_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn30_backdoor_load()
104 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn30_backdoor_load()
106 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn30_backdoor_load()
H A Ddmub_dcn32.c152 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load() argument
162 dmub_dcn32_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn32_backdoor_load()
166 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load()
168 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load()
185 const struct dmub_window *cw0, in dmub_dcn32_backdoor_load_zfb_mode() argument
192 offset = cw0->offset; in dmub_dcn32_backdoor_load_zfb_mode()
196 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn32_backdoor_load_zfb_mode()
198 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn32_backdoor_load_zfb_mode()
H A Ddmub_dcn35.c173 const struct dmub_window *cw0, in dmub_dcn35_backdoor_load() argument
181 dmub_dcn35_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn35_backdoor_load()
185 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn35_backdoor_load()
187 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn35_backdoor_load()
204 const struct dmub_window *cw0, in dmub_dcn35_backdoor_load_zfb_mode() argument
210 offset = cw0->offset; in dmub_dcn35_backdoor_load_zfb_mode()
213 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn35_backdoor_load_zfb_mode()
215 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn35_backdoor_load_zfb_mode()
H A Ddmub_dcn401.c131 const struct dmub_window *cw0, in dmub_dcn401_backdoor_load() argument
144 dmub_dcn401_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn401_backdoor_load()
148 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn401_backdoor_load()
150 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn401_backdoor_load()
168 const struct dmub_window *cw0, in dmub_dcn401_backdoor_load_zfb_mode() argument
178 offset = cw0->offset; in dmub_dcn401_backdoor_load_zfb_mode()
182 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn401_backdoor_load_zfb_mode()
184 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn401_backdoor_load_zfb_mode()
H A Ddmub_dcn30.h38 const struct dmub_window *cw0,
H A Ddmub_dcn20.c155 const struct dmub_window *cw0, in dmub_dcn20_backdoor_load() argument
167 dmub_dcn20_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn20_backdoor_load()
171 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn20_backdoor_load()
173 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn20_backdoor_load()
H A Ddmub_dcn31.c158 const struct dmub_window *cw0, in dmub_dcn31_backdoor_load() argument
168 dmub_dcn31_translate_addr(&cw0->offset, fb_base, fb_offset, &offset); in dmub_dcn31_backdoor_load()
172 REG_WRITE(DMCUB_REGION3_CW0_BASE_ADDRESS, cw0->region.base); in dmub_dcn31_backdoor_load()
174 DMCUB_REGION3_CW0_TOP_ADDRESS, cw0->region.top, in dmub_dcn31_backdoor_load()
H A Ddmub_srv.c628 struct dmub_window cw0, cw1, cw2, cw3, cw4, cw5, cw6, region6; in dmub_srv_hw_init() local
650 cw0.offset.quad_part = inst_fb->gpu_addr; in dmub_srv_hw_init()
651 cw0.region.base = DMUB_CW0_BASE; in dmub_srv_hw_init()
652 cw0.region.top = cw0.region.base + inst_fb->size - 1; in dmub_srv_hw_init()
671 dmub->hw_funcs.backdoor_load_zfb_mode(dmub, &cw0, &cw1); in dmub_srv_hw_init()
673 dmub->hw_funcs.backdoor_load(dmub, &cw0, &cw1); in dmub_srv_hw_init()
H A Ddmub_dcn32.h197 const struct dmub_window *cw0,
201 const struct dmub_window *cw0,
H A Ddmub_dcn35.h210 const struct dmub_window *cw0,
214 const struct dmub_window *cw0,
H A Ddmub_dcn401.h207 const struct dmub_window *cw0,
211 const struct dmub_window *cw0,
H A Ddmub_dcn20.h192 const struct dmub_window *cw0,
H A Ddmub_dcn31.h194 const struct dmub_window *cw0,
/linux-6.15/drivers/gpu/drm/amd/display/dmub/
H A Ddmub_srv.h386 const struct dmub_window *cw0,
390 const struct dmub_window *cw0,