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Searched refs:cp0 (Results 1 – 25 of 30) sorted by relevance

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/linux-6.15/arch/arm64/boot/dts/marvell/
H A Darmada-7040-mochabin.dts73 cp0_uart0_pins: cp0-uart0-pins {
78 cp0_spi0_pins: cp0-spi0-pins {
83 cp0_spi1_pins: cp0-spi1-pins {
88 cp0_i2c0_pins: cp0-i2c0-pins {
93 cp0_i2c1_pins: cp0-i2c1-pins {
103 cp0_rgmii1_pins: cp0-rgmii1-pins {
114 cp0_pcie_reset_pins: cp0-pcie-reset-pins {
124 cp0_switch_pins: cp0-switch-pins {
129 cp0_phy_pins: cp0-phy-pins {
422 phy-names = "cp0-usb3h0-comphy", "utmi";
[all …]
H A Dcn9132-sr-cex7.dtsi299 com_10g_int0_pins: cp0-10g-int-pins {
304 cp0_eth1_pins: cp0-eth1-pins {
312 cp0_fan_pwm_pins: cp0-fan-pwm-pins {
322 cp0_i2c0_pins: cp0-i2c0-pins {
327 cp0_i2c1_pins: cp0-i2c1-pins {
332 cp0_mdio_pins: cp0-mdio-pins {
337 cp0_mmc0_pins: cp0-mmc0-pins {
343 cp0_mmc0_cd_pins: cp0-mmc0-cd-pins {
348 cp0_pwrbtn_pins: cp0-pwrbtn-pins {
363 cp0_spi1_pins: cp0-spi1-pins {
[all …]
H A Dcn9130-db.dtsi44 regulator-name = "cp0-xhci0-vbus";
58 regulator-name = "cp0-xhci1-vbus";
341 cp0_i2c0_pins: cp0-i2c-pins-0 {
345 cp0_i2c1_pins: cp0-i2c-pins-1 {
349 cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
356 cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
363 cp0_sdhci_cd_pins: cp0-sdhci-cd-pins-0 {
367 cp0_sdhci_pins: cp0-sdhi-pins-0 {
372 cp0_spi1_pins: cp0-spi-pins-1 {
H A Dcn9130-sr-som.dtsi122 cp0_eth2_pins: cp0-ge2-rgmii-pins {
130 cp0_i2c0_pins: cp0-i2c0-pins {
135 cp0_mdio_pins: cp0-mdio-pins {
140 cp0_spi1_pins: cp0-spi1-pins {
145 cp0_reg_vhv_pins: cp0-reg-vhv-pins {
H A Darmada-7040-db.dts33 regulator-name = "cp0-usb3-0-current-regulator";
46 regulator-name = "cp0-usb3-1-current-regulator";
57 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
67 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
118 phy-names = "cp0-pcie2-x1-phy";
234 phy-names = "cp0-usb3h0-comphy", "utmi";
248 phy-names = "cp0-usb3h1-comphy", "utmi";
H A Darmada-8040-db.dts34 cp0_reg_usb3_0_vbus: cp0-usb3-0-vbus {
36 regulator-name = "cp0-usb3h0-vbus";
43 cp0_reg_usb3_1_vbus: cp0-usb3-1-vbus {
45 regulator-name = "cp0-usb3h1-vbus";
52 cp0_usb3_0_phy: cp0-usb3-0-phy {
107 phy-names = "cp0-pcie0-x1-phy";
114 phy-names = "cp0-pcie2-x1-phy";
H A Dcn9130-cf.dtsi126 cp0_i2c1_pins: cp0-i2c1-pins {
131 cp0_mmc0_pins: cp0-mmc0-pins {
137 mikro_spi_pins: cp0-spi1-cs1-pins {
142 mikro_uart_pins: cp0-uart-pins {
147 expander0_pins: cp0-expander0-pins {
H A Dcn9130-crb.dtsi41 regulator-name = "cp0-xhci1-vbus";
105 cp0_i2c0_pins: cp0-i2c-pins-0 {
109 cp0_i2c1_pins: cp0-i2c-pins-1 {
113 cp0_sdhci_cd_pins_crb: cp0-sdhci-cd-pins-crb {
117 cp0_sdhci_pins: cp0-sdhi-pins-0 {
122 cp0_spi1_pins: cp0-spi-pins-1 {
H A Dcn9131-cf-solidwan.dts328 cp0_i2c1_pins: cp0-i2c1-pins {
333 cp0_led_pins: cp0-led-pins {
338 cp0_m2_0_shutdown_pins: cp0-m2-0-shutdown-pins {
343 cp0_mmc0_pins: cp0-mmc0-pins {
349 cp0_mpcie_rfkill_pins: cp0-mpcie-rfkill-pins {
354 cp0_reg_usb_a_vbus0_pins: cp0-reg-usb-a-vbus0-pins {
359 cp0_reg_usb_a_vbus1_pins: cp0-reg-usb-a-vbus1-pins {
364 cp0_sfp0_pins: cp0-sfp0-pins {
369 cp0_spi1_cs1_pins: cp0-spi1-cs1-pins {
579 cp1_i2c1_pins: cp0-i2c1-pins {
H A Dcn9130-cf-pro.dts325 dsa_clk_pins: cp0-dsa-clk-pins {
330 dsa_pins: cp0-dsa-pins {
335 rear_button_pins: cp0-rear-button-pins {
340 cp0_spi1_cs1_pins: cp0-spi1-cs1-pins {
H A Darmada-8040-mcbin.dtsi188 phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
189 "cp0-pcie0-x4-lane2-phy", "cp0-pcie0-x4-lane3-phy";
H A Dcn9130-cf-base.dts142 rear_button_pins: cp0-rear-button-pins {
147 sim_select_pins: cp0-sim-select-pins {
H A Dcn9130.dtsi27 #define CP11X_NAME cp0
H A Darmada-70x0.dtsi20 #define CP11X_NAME cp0
H A Darmada-80x0.dtsi22 #define CP11X_NAME cp0
H A Darmada-8040-puzzle-m801.dts67 sfp_cp0_eth0: sfp-cp0-eth0 {
337 phy-names = "cp0-pcie0-x1-phy";
/linux-6.15/security/tomoyo/
H A Drealpath.c29 char *cp0; in tomoyo_encode2() local
48 cp0 = cp; in tomoyo_encode2()
65 return cp0; in tomoyo_encode2()
H A Dcommon.c2761 char *cp0; in tomoyo_write_control() local
2768 cp0 = head->write_buf; in tomoyo_write_control()
2783 memmove(cp, cp0, head->w.avail); in tomoyo_write_control()
2784 kfree(cp0); in tomoyo_write_control()
2786 cp0 = cp; in tomoyo_write_control()
2795 cp0[head->w.avail++] = c; in tomoyo_write_control()
2798 cp0[head->w.avail - 1] = '\0'; in tomoyo_write_control()
2800 tomoyo_normalize_line(cp0); in tomoyo_write_control()
2801 if (!strcmp(cp0, "reset")) { in tomoyo_write_control()
2813 if (tomoyo_select_domain(head, cp0)) in tomoyo_write_control()
[all …]
/linux-6.15/arch/arm/kernel/
H A DMakefile77 obj-$(CONFIG_CPU_XSCALE) += xscale-cp0.o
78 obj-$(CONFIG_CPU_XSC3) += xscale-cp0.o
79 obj-$(CONFIG_CPU_MOHAWK) += xscale-cp0.o
/linux-6.15/Documentation/devicetree/bindings/pci/
H A Dpci-armada8k.txt25 Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for
/linux-6.15/arch/xtensa/kernel/
H A Dptrace.c137 newregs->cp0 = ti->xtregs_cp.cp0; in tie_get()
175 ti->xtregs_cp.cp0 = newregs->cp0; in tie_set()
/linux-6.15/arch/xtensa/include/asm/
H A Dthread_info.h36 xtregs_cp0_t cp0; member
H A Delf.h182 xtregs_cp0_t cp0; member
/linux-6.15/Documentation/driver-api/mtd/
H A Dnand_ecc.rst53 cp1 cp0 cp1 cp0 cp1 cp0 cp1 cp0
63 - cp0 is the parity that belongs to all bit0, bit2, bit4, bit6.
65 so the sum of all bit0, bit2, bit4 and bit6 values + cp0 itself is even.
74 Note that each of cp0 .. cp5 is exactly one bit.
109 ECC 2 cp5 cp4 cp3 cp2 cp1 cp0 1 1
160 cp0 = bit6 ^ bit4 ^ bit2 ^ bit0 ^ cp0;
/linux-6.15/Documentation/devicetree/bindings/pinctrl/
H A Dti,da850-pupd.txt18 Valid names are "cp0".."cp31".

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