Home
last modified time | relevance | path

Searched refs:consts (Results 1 – 25 of 54) sorted by relevance

123

/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_llc.c51 struct ia_constants *consts) in get_ia_constants() argument
59 consts->max_ia_freq = cpu_max_MHz(); in get_ia_constants()
61 consts->min_ring_freq = in get_ia_constants()
64 consts->min_ring_freq = mult_frac(consts->min_ring_freq, 8, 3); in get_ia_constants()
74 const struct ia_constants *consts, in calc_ia_freq() argument
79 const int diff = consts->max_gpu_freq - gpu_freq; in calc_ia_freq()
120 struct ia_constants consts; in gen6_update_ring_freq() local
123 if (!get_ia_constants(llc, &consts)) in gen6_update_ring_freq()
130 if (consts.max_gpu_freq <= consts.min_gpu_freq) in gen6_update_ring_freq()
137 for (gpu_freq = consts.max_gpu_freq; in gen6_update_ring_freq()
[all …]
H A Dselftest_llc.c12 struct ia_constants consts; in gen6_verify_ring_freq() local
19 if (!get_ia_constants(llc, &consts)) in gen6_verify_ring_freq()
22 for (gpu_freq = consts.min_gpu_freq; in gen6_verify_ring_freq()
23 gpu_freq <= consts.max_gpu_freq; in gen6_verify_ring_freq()
30 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); in gen6_verify_ring_freq()
36 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); in gen6_verify_ring_freq()
44 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
54 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, in gen6_verify_ring_freq()
/linux-6.15/arch/riscv/lib/
H A Dcrc-clmul-template.h118 tmp = clmul(msgpoly, consts->barrett_reduction_const_1); in crc_clmul_long()
146 return clmulr(tmp, consts->barrett_reduction_const_2); in crc_clmul_long()
148 return clmul(tmp, consts->barrett_reduction_const_2); in crc_clmul_long()
155 const struct crc_clmul_consts *consts) in crc_clmul_update_long() argument
163 const struct crc_clmul_consts *consts) in crc_clmul_update_partial() argument
184 return crc_clmul_long(msgpoly, consts); in crc_clmul_update_partial()
197 const struct crc_clmul_consts *consts) in crc_clmul() argument
208 crc = crc_clmul_update_partial(crc, p, align, consts); in crc_clmul()
251 crc = crc_clmul_long(m0, consts); in crc_clmul()
252 crc = crc_clmul_update_long(crc, m1, consts); in crc_clmul()
[all …]
H A Dcrc-clmul.h11 const struct crc_clmul_consts *consts);
13 const struct crc_clmul_consts *consts);
15 const struct crc_clmul_consts *consts);
18 const struct crc_clmul_consts *consts);
20 const struct crc_clmul_consts *consts);
H A Dcrc64_msb.c15 const struct crc_clmul_consts *consts) in crc64_msb_clmul() argument
17 return crc_clmul(crc, p, len, consts); in crc64_msb_clmul()
H A Dcrc32_lsb.c15 const struct crc_clmul_consts *consts) in crc32_lsb_clmul() argument
17 return crc_clmul(crc, p, len, consts); in crc32_lsb_clmul()
H A Dcrc32_msb.c15 const struct crc_clmul_consts *consts) in crc32_msb_clmul() argument
17 return crc_clmul(crc, p, len, consts); in crc32_msb_clmul()
H A Dcrc16_msb.c15 const struct crc_clmul_consts *consts) in crc16_msb_clmul() argument
17 return crc_clmul(crc, p, len, consts); in crc16_msb_clmul()
H A Dcrc64_lsb.c15 const struct crc_clmul_consts *consts) in crc64_lsb_clmul() argument
17 return crc_clmul(crc, p, len, consts); in crc64_lsb_clmul()
/linux-6.15/drivers/net/ethernet/microchip/sparx5/
H A Dsparx5_ptp.c281 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_get_hwtimestamp() local
293 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_get_hwtimestamp()
448 const struct sparx5_consts *consts; in sparx5_ptp_settime64() local
451 consts = sparx5->data->consts; in sparx5_ptp_settime64()
462 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
478 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_settime64()
489 const struct sparx5_consts *consts; in sparx5_ptp_gettime64() local
494 consts = sparx5->data->consts; in sparx5_ptp_gettime64()
504 sparx5, PTP_PTP_PIN_CFG(consts->tod_pin)); in sparx5_ptp_gettime64()
529 const struct sparx5_consts *consts; in sparx5_ptp_adjtime() local
[all …]
H A Dsparx5_pgid.c8 for (i = 0; i < spx5->data->consts->n_pgids; i++) in sparx5_pgid_init()
26 i < spx5->data->consts->n_pgids; i++) { in sparx5_pgid_alloc_mcast()
40 idx >= spx5->data->consts->n_pgids) in sparx5_pgid_free()
52 return sparx5->data->consts->n_ports + pgid; in sparx5_get_pgid()
H A Dsparx5_psfp.c26 sparx5->data->consts->n_filters, id); in sparx5_psfp_sf_get()
32 sparx5->data->consts->n_filters, id); in sparx5_psfp_sf_put()
38 sparx5->data->consts->n_gates, idx, id); in sparx5_psfp_sg_get()
44 sparx5->data->consts->n_gates, id); in sparx5_psfp_sg_put()
50 sparx5->data->consts->n_sdlbs, idx, id); in sparx5_psfp_fm_get()
56 sparx5->data->consts->n_sdlbs, id); in sparx5_psfp_fm_put()
326 for (i = 0; i < sparx5->data->consts->n_lb_groups; i++) { in sparx5_psfp_init()
H A Dsparx5_calendar.c122 if (portno >= sparx5->data->consts->n_ports) { in sparx5_get_port_cal_speed()
156 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_config_auto_calendar() local
172 for (portno = 0; portno < consts->n_ports_all; portno++) { in sparx5_config_auto_calendar()
180 if (portno < consts->n_ports) in sparx5_config_auto_calendar()
212 for (idx = 0; idx < consts->n_auto_cals; idx++) in sparx5_config_auto_calendar()
303 if (portno < sparx5->data->consts->n_ports_all) { in sparx5_dsm_calendar_calc()
592 for (taxi = 0; taxi < sparx5->data->consts->n_dsm_cal_taxis; ++taxi) { in sparx5_config_dsm_calendar()
H A Dsparx5_main.c605 for (idx = 0; idx < sparx5->data->consts->n_sio_clks; idx++) in sparx5_init_coreclock()
627 return (sparx5->data->consts->buf_size / SPX5_BUFFER_CELL_SZ - 100) * in qlim_wm()
633 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_qlim_set() local
640 consts->qres_max_prio_idx + in sparx5_qlim_set()
646 consts->qres_max_colour_idx + in sparx5_qlim_set()
676 for (idx = 0; idx < sparx5->data->consts->n_ports; idx++) in sparx5_board_init()
687 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_start() local
694 for (idx = 0; idx < consts->n_own_upsids; idx++) { in sparx5_start()
702 for (idx = consts->n_ports; idx < consts->n_ports_all; idx++) in sparx5_start()
1110 .consts = &sparx5_consts,
H A Dsparx5_vcap_impl.c1780 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_is0_port_key_selection() local
1807 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_is2_port_key_selection() local
1824 for (portno = 0; portno < consts->n_ports; ++portno) in sparx5_vcap_is2_port_key_selection()
1835 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_es0_port_key_selection() local
1852 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_es2_port_key_selection() local
1892 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_port_key_deselection() local
2034 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_vcap_init() local
2056 ctrl->vcaps = consts->vcaps; in sparx5_vcap_init()
2057 ctrl->stats = consts->vcap_stats; in sparx5_vcap_init()
2063 cfg = &consts->vcaps_cfg[idx]; in sparx5_vcap_init()
[all …]
H A Dsparx5_mactable.c83 const struct sparx5_consts *consts = sparx5->data->consts; in sparx5_mact_learn() local
86 if (pgid < consts->n_ports) { in sparx5_mact_learn()
92 addr = pgid - consts->n_ports; in sparx5_mact_learn()
376 if (port >= sparx5->data->consts->n_ports) in sparx5_mact_handle_entry()
/linux-6.15/crypto/
H A Dcmac.c31 __be64 consts[]; member
55 __be64 *consts = ctx->consts; in crypto_cmac_digest_setkey() local
65 memset(consts, 0, bs); in crypto_cmac_digest_setkey()
66 crypto_cipher_encrypt_one(ctx->child, (u8 *)consts, (u8 *)consts); in crypto_cmac_digest_setkey()
71 _const[0] = be64_to_cpu(consts[1]); in crypto_cmac_digest_setkey()
72 _const[1] = be64_to_cpu(consts[0]); in crypto_cmac_digest_setkey()
80 consts[i + 0] = cpu_to_be64(_const[1]); in crypto_cmac_digest_setkey()
81 consts[i + 1] = cpu_to_be64(_const[0]); in crypto_cmac_digest_setkey()
87 _const[0] = be64_to_cpu(consts[0]); in crypto_cmac_digest_setkey()
94 consts[i] = cpu_to_be64(_const[0]); in crypto_cmac_digest_setkey()
[all …]
H A Dxcbc.c30 u8 consts[]; member
55 u8 *consts = ctx->consts; in crypto_xcbc_digest_setkey() local
63 crypto_cipher_encrypt_one(ctx->child, consts, (u8 *)ks + bs); in crypto_xcbc_digest_setkey()
64 crypto_cipher_encrypt_one(ctx->child, consts + bs, (u8 *)ks + bs * 2); in crypto_xcbc_digest_setkey()
155 crypto_xor(prev, &tctx->consts[offset], bs); in crypto_xcbc_digest_final()
/linux-6.15/rust/macros/
H A Dvtable.rs31 let mut consts = HashSet::new(); in vtable() localVariable
48 consts.insert(const_name); in vtable()
66 if consts.contains(&gen_const_name) { in vtable()
77 consts.insert(gen_const_name); in vtable()
84 if consts.contains(&gen_const_name) { in vtable()
/linux-6.15/arch/arm64/crypto/
H A Dsm4-ce-glue.c63 u8 __aligned(8) consts[];
527 be128 *consts = (be128 *)ctx->consts; in sm4_cmac_setkey() local
533 memset(consts, 0, SM4_BLOCK_SIZE); in sm4_cmac_setkey()
541 sm4_ce_crypt_block(ctx->key.rkey_enc, (u8 *)consts, (const u8 *)consts); in sm4_cmac_setkey()
546 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey()
547 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey()
548 consts[0].a = cpu_to_be64((a << 1) | (b >> 63)); in sm4_cmac_setkey()
551 a = be64_to_cpu(consts[0].a); in sm4_cmac_setkey()
552 b = be64_to_cpu(consts[0].b); in sm4_cmac_setkey()
654 const u8 *consts = tctx->consts; in sm4_cmac_final() local
[all …]
H A Daes-glue.c129 u8 __aligned(8) consts[];
821 be128 *consts = (be128 *)ctx->consts; in cmac_setkey() local
831 aes_ecb_encrypt(ctx->consts, (u8[AES_BLOCK_SIZE]){}, ctx->key.key_enc, in cmac_setkey()
835 cmac_gf128_mul_by_x(consts, consts); in cmac_setkey()
836 cmac_gf128_mul_by_x(consts + 1, consts); in cmac_setkey()
861 aes_ecb_encrypt(ctx->consts, ks[1], ctx->key.key_enc, rounds, 2); in xcbc_setkey()
964 u8 *consts = tctx->consts; in cmac_final() local
968 consts += AES_BLOCK_SIZE; in cmac_final()
971 mac_do_update(&tctx->key, consts, 1, ctx->dg, 0, 1); in cmac_final()
/linux-6.15/arch/x86/lib/
H A Dcrc-pclmul-template.S138 .macro _fold_vec acc, data, consts, tmp
139 _pclmulqdq \consts, HI64_TERMS, \acc, HI64_TERMS, \tmp
140 _pclmulqdq \consts, LO64_TERMS, \acc, LO64_TERMS, \acc
154 .macro _fold_vec_mem vl, acc, data, consts, bswap_mask, tmp1, tmp2
157 _fold_vec \acc, \tmp1, \consts, \tmp2
159 _fold_vec \acc, \data, \consts, \tmp1
174 .macro _fold_vec_final vl, v0, v1, consts, bswap_mask, tmp1, tmp2
175 _fold_vec \v0, \v1, \consts, \tmp1
178 _fold_vec_mem \vl, \v0, (BUF), \consts, \bswap_mask, \tmp1, \tmp2
H A Dcrc-pclmul-template.h61 #define CRC_PCLMUL(crc, p, len, prefix, consts, have_pclmulqdq) \ argument
67 consts_ptr = (consts).fold_across_128_bits_consts; \
/linux-6.15/sound/soc/sdca/
H A Dsdca_regmap.c242 struct reg_default *consts) in sdca_regmap_populate_constants() argument
258 consts[k].reg = SDW_SDCA_CTL(function->desc->adr, in sdca_regmap_populate_constants()
261 consts[k].def = control->value; in sdca_regmap_populate_constants()
/linux-6.15/drivers/net/ethernet/microchip/sparx5/lan969x/
H A Dlan969x_fdma.c103 const struct sparx5_consts *consts = sparx5->data->consts; in lan969x_fdma_rx_get_frame() local
115 port = fi.src_port < consts->n_ports ? sparx5->ports[fi.src_port] : in lan969x_fdma_rx_get_frame()
222 for (int idx = 0; idx < sparx5->data->consts->n_ports; ++idx) { in lan969x_fdma_rx_init()

123