| /linux-6.15/drivers/spi/ |
| H A D | spi-zynq-qspi.c | 183 u32 config_reg; in zynq_qspi_init_hw() local
189 config_reg = 0; in zynq_qspi_init_hw()
192 config_reg |= ZYNQ_QSPI_LCFG_TWO_MEM; in zynq_qspi_init_hw()
294 u32 config_reg; in zynq_qspi_chipselect() local
300 config_reg &= ~ZYNQ_QSPI_LCFG_U_PAGE; in zynq_qspi_chipselect()
302 config_reg |= ZYNQ_QSPI_LCFG_U_PAGE; in zynq_qspi_chipselect()
310 config_reg &= ~ZYNQ_QSPI_CONFIG_PCS; in zynq_qspi_chipselect()
312 config_reg |= ZYNQ_QSPI_CONFIG_PCS; in zynq_qspi_chipselect()
338 u32 config_reg, baud_rate_val = 0; in zynq_qspi_config_op() local
360 config_reg |= ZYNQ_QSPI_CONFIG_CPHA_MASK; in zynq_qspi_config_op()
[all …]
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| H A D | spi-zynqmp-gqspi.c | 355 u32 config_reg, baud_rate_val = 0; in zynqmp_qspi_init_hw() local
379 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
383 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
385 config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK; in zynqmp_qspi_init_hw()
387 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
392 config_reg |= GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
394 config_reg &= ~GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
397 config_reg |= GQSPI_CFG_CLK_POL_MASK; in zynqmp_qspi_init_hw()
399 config_reg &= ~GQSPI_CFG_CLK_POL_MASK; in zynqmp_qspi_init_hw()
728 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_disable_dma()
[all …]
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| /linux-6.15/drivers/iio/common/ms_sensors/ |
| H A D | ms_sensors_i2c.c | 254 u8 *config_reg) in ms_sensors_read_config_reg() argument
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
345 u8 config_reg; in ms_sensors_show_heater() local
373 u8 val, config_reg; in ms_sensors_write_heater() local
390 config_reg &= 0xFB; in ms_sensors_write_heater()
391 config_reg |= val << 2; in ms_sensors_write_heater()
[all …]
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| /linux-6.15/drivers/clk/qcom/ |
| H A D | hfpll.c | 23 .config_reg = 0x14,
41 .config_reg = 0x14,
58 .config_reg = 0x14,
75 .config_reg = 0x14,
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| H A D | clk-pll.c | 103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
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| H A D | clk-hfpll.h | 17 u32 config_reg; member
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| H A D | clk-pll.h | 43 u32 config_reg; member
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| H A D | a53-pll.c | 113 pll->config_reg = 0x14; in qcom_a53pll_probe()
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| H A D | gcc-ipq806x.c | 36 .config_reg = 0x30d4,
65 .config_reg = 0x3174,
94 .config_reg = 0x3154,
124 .config_reg = 0x3204,
150 .config_reg = 0x3244,
176 .config_reg = 0x3304,
201 .config_reg = 0x31d4,
246 .config_reg = 0x31b4,
265 .config_reg = 0x3194,
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| H A D | gcc-msm8960.c | 32 .config_reg = 0x3174,
63 .config_reg = 0x3154,
95 .config_reg = 0x3204,
123 .config_reg = 0x3244,
137 .config_reg = 0x3304,
165 .config_reg = 0x3284,
193 .config_reg = 0x32c4,
221 .config_reg = 0x3304,
235 .config_reg = 0x3404,
262 .config_reg = 0x31d4,
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| H A D | clk-hfpll.c | 31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
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| H A D | gcc-msm8939.c | 56 .config_reg = 0x21010,
87 .config_reg = 0x20010,
118 .config_reg = 0x4a010,
149 .config_reg = 0x23010,
180 .config_reg = 0x22010,
227 .config_reg = 0x24010,
273 .config_reg = 0x25010,
304 .config_reg = 0x37010,
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| H A D | lcc-ipq806x.c | 30 .config_reg = 0x14,
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| H A D | gcc-mdm9615.c | 51 .config_reg = 0x30d4,
93 .config_reg = 0x3154,
122 .config_reg = 0x31d4,
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| H A D | mmcc-apq8084.c | 47 .config_reg = 0x0014,
78 .config_reg = 0x0050,
109 .config_reg = 0x4110,
126 .config_reg = 0x0090,
144 .config_reg = 0x00b0,
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| H A D | lcc-msm8960.c | 33 .config_reg = 0x14,
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| H A D | mmcc-msm8974.c | 48 .config_reg = 0x0014,
79 .config_reg = 0x0050,
110 .config_reg = 0x4110,
127 .config_reg = 0x0090,
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| H A D | gcc-msm8976.c | 59 .config_reg = 0x21014,
92 .config_reg = 0x4a014,
128 .config_reg = 0x22010,
176 .config_reg = 0x24018,
208 .config_reg = 0x37014,
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| /linux-6.15/drivers/input/misc/ |
| H A D | max77693-haptic.c | 109 unsigned int value, config_reg; in max77693_haptic_configure() local
118 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
125 config_reg = MAX77705_PMIC_REG_MCONFIG; in max77693_haptic_configure()
131 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
138 config_reg, value); in max77693_haptic_configure()
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| /linux-6.15/drivers/hwmon/ |
| H A D | max6620.c | 99 static const u8 config_reg[] = { variable
171 ret = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_update_device()
449 reg = i2c_smbus_read_byte_data(client, config_reg[i]); in max6620_init_client()
456 err = i2c_smbus_write_byte_data(client, config_reg[i], data->fancfg[i]); in max6620_init_client()
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| /linux-6.15/drivers/net/phy/aquantia/ |
| H A D | aquantia_main.c | 571 u32 config_reg; in aqr107_read_rate() local
586 config_reg = VEND1_GLOBAL_CFG_10M; in aqr107_read_rate()
590 config_reg = VEND1_GLOBAL_CFG_100M; in aqr107_read_rate()
594 config_reg = VEND1_GLOBAL_CFG_1G; in aqr107_read_rate()
598 config_reg = VEND1_GLOBAL_CFG_2_5G; in aqr107_read_rate()
602 config_reg = VEND1_GLOBAL_CFG_5G; in aqr107_read_rate()
606 config_reg = VEND1_GLOBAL_CFG_10G; in aqr107_read_rate()
613 val = phy_read_mmd(phydev, MDIO_MMD_VEND1, config_reg); in aqr107_read_rate()
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| /linux-6.15/drivers/pinctrl/renesas/ |
| H A D | core.c | 252 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
254 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
255 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
271 curr_width = abs(config_reg->var_field_width[m]); in sh_pfc_get_config_reg()
272 if (config_reg->var_field_width[m] < 0) in sh_pfc_get_config_reg()
278 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
279 *crp = config_reg; in sh_pfc_get_config_reg()
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| /linux-6.15/drivers/i2c/busses/ |
| H A D | i2c-mlxbf.c | 1369 u32 config_reg; in mlxbf_i2c_init_master() local
1406 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1407 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_ASSERT_PINS(priv->bus, in mlxbf_i2c_init_master()
1408 config_reg); in mlxbf_i2c_init_master()
1409 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FUNC_EN_0); in mlxbf_i2c_init_master()
1411 config_reg = readl(gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
1412 config_reg = MLXBF_I2C_GPIO_SMBUS_GW_RESET_PINS(priv->bus, in mlxbf_i2c_init_master()
1413 config_reg); in mlxbf_i2c_init_master()
1414 writel(config_reg, gpio_res->io + MLXBF_I2C_GPIO_0_FORCE_OE_EN); in mlxbf_i2c_init_master()
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| /linux-6.15/drivers/net/phy/ |
| H A D | phylink.c | 3805 uint16_t config_reg, int speed) in phylink_decode_c37_word() argument
3814 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); in phylink_decode_c37_word()
3829 uint16_t config_reg) in phylink_decode_sgmii_word() argument
3831 if (!(config_reg & LPA_SGMII_LINK)) { in phylink_decode_sgmii_word()
3836 switch (config_reg & LPA_SGMII_SPD_MASK) { in phylink_decode_sgmii_word()
3850 if (config_reg & LPA_SGMII_FULL_DUPLEX) in phylink_decode_sgmii_word()
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| /linux-6.15/drivers/usb/cdns3/ |
| H A D | cdnsp-mem.c | 1223 val = readl(&pdev->op_regs->config_reg); in cdnsp_mem_init()
1225 writel(val, &pdev->op_regs->config_reg); in cdnsp_mem_init()
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