Searched refs:conf_regs (Results 1 – 2 of 2) sorted by relevance
81 u16 conf_regs[CM32181_CONF_REG_NUM]; member155 cm32181->conf_regs[i] = vals[CPM0_HEADER_SIZE + i]; in cm32181_acpi_parse_cpm_tables()213 cm32181->conf_regs[CM32181_REG_ADDR_CMD] = in cm32181_reg_init()225 cm32181->conf_regs[i]); in cm32181_reg_init()247 als_it = cm32181->conf_regs[CM32181_REG_ADDR_CMD]; in cm32181_read_als_it()286 cm32181->conf_regs[CM32181_REG_ADDR_CMD] &= in cm32181_write_als_it()288 cm32181->conf_regs[CM32181_REG_ADDR_CMD] |= in cm32181_write_als_it()291 cm32181->conf_regs[CM32181_REG_ADDR_CMD]); in cm32181_write_als_it()517 cm32181->conf_regs[CM32181_REG_ADDR_CMD]); in cm32181_resume()
138 void __iomem *conf_regs; member218 nfc->conf_regs + PL35X_SMC_DIRECT_CMD); in pl35x_smc_update_regs()226 writel(bw, nfc->conf_regs + PL35X_SMC_OPMODE); in pl35x_smc_set_buswidth()235 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_smc_clear_irq()278 ecc_cfg = readl(nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()281 writel(ecc_cfg, nfc->conf_regs + PL35X_SMC_ECC_CFG); in pl35x_smc_set_ecc_mode()1008 nfc->conf_regs + PL35X_SMC_MEMC_CFG_CLR); in pl35x_nand_reset_state()1028 nfc->conf_regs + PL35X_SMC_ECC_CMD1); in pl35x_nand_reset_state()1033 nfc->conf_regs + PL35X_SMC_ECC_CMD2); in pl35x_nand_reset_state()1152 if (IS_ERR(nfc->conf_regs)) in pl35x_nand_probe()[all …]