Searched refs:cmrr (Results 1 – 4 of 4) sorted by relevance
218 crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()220 crtc_state->cmrr.cmrr_m = do_div(adjusted_pixel_rate, crtc_state->cmrr.cmrr_n); in cmrr_get_vtotal()289 crtc_state->cmrr.enable = true; in intel_vrr_compute_config()372 if (crtc_state->cmrr.enable) { in intel_vrr_set_transcoder_timings()374 upper_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()376 lower_32_bits(crtc_state->cmrr.cmrr_m)); in intel_vrr_set_transcoder_timings()378 upper_32_bits(crtc_state->cmrr.cmrr_n)); in intel_vrr_set_transcoder_timings()475 if (crtc_state->cmrr.enable) { in intel_vrr_enable()514 if (crtc_state->cmrr.enable) { in intel_vrr_get_config()515 crtc_state->cmrr.cmrr_n = in intel_vrr_get_config()[all …]
979 return old_crtc_state->cmrr.cmrr_m != new_crtc_state->cmrr.cmrr_m || in cmrr_params_changed()980 old_crtc_state->cmrr.cmrr_n != new_crtc_state->cmrr.cmrr_n; in cmrr_params_changed()5394 PIPE_CONF_CHECK_LLI(cmrr.cmrr_m); in intel_pipe_config_compare()5395 PIPE_CONF_CHECK_LLI(cmrr.cmrr_n); in intel_pipe_config_compare()5396 PIPE_CONF_CHECK_BOOL(cmrr.enable); in intel_pipe_config_compare()
1316 } cmrr; member
2848 if (crtc_state->cmrr.enable) { in intel_dp_compute_as_sdp()