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Searched refs:clock_ranges (Results 1 – 21 of 21) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
H A Dsmu_v13_0_5_ppt.c409 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_5_set_watermarks_table() argument
415 if (!table || !clock_ranges) in smu_v13_0_5_set_watermarks_table()
418 if (clock_ranges) { in smu_v13_0_5_set_watermarks_table()
420 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_5_set_watermarks_table()
425 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_5_set_watermarks_table()
429 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
431 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
434 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_5_set_watermarks_table()
439 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
441 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_5_set_watermarks_table()
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H A Dsmu_v13_0_4_ppt.c664 struct pp_smu_wm_range_sets *clock_ranges) in smu_v13_0_4_set_watermarks_table() argument
670 if (!table || !clock_ranges) in smu_v13_0_4_set_watermarks_table()
674 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v13_0_4_set_watermarks_table()
679 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
681 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v13_0_4_set_watermarks_table()
683 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
685 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
688 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v13_0_4_set_watermarks_table()
693 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
695 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v13_0_4_set_watermarks_table()
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H A Dyellow_carp_ppt.c500 struct pp_smu_wm_range_sets *clock_ranges) in yellow_carp_set_watermarks_table() argument
506 if (!table || !clock_ranges) in yellow_carp_set_watermarks_table()
509 if (clock_ranges) { in yellow_carp_set_watermarks_table()
511 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()
516 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()
520 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
522 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
525 clock_ranges->reader_wm_sets[i].wm_inst; in yellow_carp_set_watermarks_table()
530 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()
532 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
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/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Drenoir_ppt.c1066 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument
1072 if (clock_ranges) { in renoir_set_watermarks_table()
1080 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()
1084 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1086 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1089 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
1091 clock_ranges->reader_wm_sets[i].wm_type; in renoir_set_watermarks_table()
1096 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()
1098 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1105 clock_ranges->writer_wm_sets[i].wm_inst; in renoir_set_watermarks_table()
[all …]
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu14/
H A Dsmu_v14_0_0_ppt.c483 struct pp_smu_wm_range_sets *clock_ranges) in smu_v14_0_0_set_watermarks_table() argument
489 if (!table || !clock_ranges) in smu_v14_0_0_set_watermarks_table()
493 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in smu_v14_0_0_set_watermarks_table()
498 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
500 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in smu_v14_0_0_set_watermarks_table()
502 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
504 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
507 clock_ranges->reader_wm_sets[i].wm_inst; in smu_v14_0_0_set_watermarks_table()
512 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
514 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in smu_v14_0_0_set_watermarks_table()
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/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dvangogh_ppt.c1598 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument
1604 if (!table || !clock_ranges) in vangogh_set_watermarks_table()
1607 if (clock_ranges) { in vangogh_set_watermarks_table()
1609 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()
1614 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()
1618 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1620 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
1623 clock_ranges->reader_wm_sets[i].wm_inst; in vangogh_set_watermarks_table()
1628 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()
1630 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
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H A Dsienna_cichlid_ppt.c1874 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument
1880 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()
1887 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1889 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
1891 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1893 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1896 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()
1901 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1903 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1905 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()
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H A Dnavi10_ppt.c2172 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument
2178 if (clock_ranges) { in navi10_set_watermarks_table()
2185 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
2187 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()
2189 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2191 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2194 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()
2199 clock_ranges->writer_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()
2201 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
2203 clock_ranges->writer_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()
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/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/
H A Dsmu_internal.h76 #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, c… argument
H A Damdgpu_smu.c2620 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument
2630 return smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhardwaremanager.c457 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument
465 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
H A Dsmu10_hwmgr.c1361 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument
1364 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
H A Dvega12_hwmgr.c2008 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument
2012 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
H A Dvega20_hwmgr.c2949 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument
2953 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dhardwaremanager.h455 void *clock_ranges);
H A Dhwmgr.h308 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/
H A Damd_powerplay.c1135 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument
1139 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()
1143 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
/linux-6.15/drivers/gpu/drm/amd/pm/inc/
H A Damdgpu_dpm.h581 void *clock_ranges);
/linux-6.15/drivers/gpu/drm/amd/pm/
H A Damdgpu_dpm.c1786 void *clock_ranges) in amdgpu_dpm_set_watermarks_for_clocks_ranges() argument
1796 clock_ranges); in amdgpu_dpm_set_watermarks_for_clocks_ranges()
/linux-6.15/drivers/gpu/drm/amd/pm/swsmu/inc/
H A Damdgpu_smu.h833 struct pp_smu_wm_range_sets *clock_ranges);
/linux-6.15/drivers/gpu/drm/amd/include/
H A Dkgd_pp_interface.h475 void *clock_ranges);