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Searched refs:clk_rate (Results 1 – 25 of 158) sorted by relevance

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/linux-6.15/drivers/char/hw_random/
H A Dks-sa-rng.c92 static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles) in cycles_to_ns() argument
95 cycles, clk_rate); in cycles_to_ns()
98 static unsigned int startup_delay_ns(unsigned long clk_rate) in startup_delay_ns() argument
101 return cycles_to_ns(clk_rate, BIT(24)); in startup_delay_ns()
102 return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES); in startup_delay_ns()
105 static unsigned int refill_delay_ns(unsigned long clk_rate) in refill_delay_ns() argument
108 return cycles_to_ns(clk_rate, BIT(24)); in refill_delay_ns()
109 return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES); in refill_delay_ns()
116 unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk); in ks_sa_rng_init() local
145 ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate); in ks_sa_rng_init()
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/linux-6.15/drivers/ufs/host/
H A Dufs-mediatek-trace.h32 TP_PROTO(const char *name, bool scale_up, unsigned long clk_rate),
33 TP_ARGS(name, scale_up, clk_rate),
38 __field(unsigned long, clk_rate)
44 __entry->clk_rate = clk_rate;
50 __entry->clk_rate)
/linux-6.15/drivers/clocksource/
H A Dtimer-microchip-pit64b.c245 tmp = clk_rate / (*pres + 1); in mchp_pit64b_pres_compute()
348 u32 clk_rate) in mchp_pit64b_init_clksrc() argument
374 ret = clocksource_register_hz(&cs->clksrc, clk_rate); in mchp_pit64b_init_clksrc()
388 mchp_pit64b_dt.freq = clk_rate; in mchp_pit64b_init_clksrc()
395 u32 clk_rate, u32 irq) in mchp_pit64b_init_clkevt() argument
437 unsigned long clk_rate; in mchp_pit64b_dt_init_timer() local
468 clk_rate = clk_get_rate(timer.gclk); in mchp_pit64b_dt_init_timer()
470 clk_rate = clk_get_rate(timer.pclk); in mchp_pit64b_dt_init_timer()
471 clk_rate = clk_rate / (MCHP_PIT64B_MODE_TO_PRES(timer.mode) + 1); in mchp_pit64b_dt_init_timer()
474 ret = mchp_pit64b_init_clkevt(&timer, clk_rate, irq); in mchp_pit64b_dt_init_timer()
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H A Dtimer-vf-pit.c153 unsigned long clk_rate; in pit_timer_init() local
182 clk_rate = clk_get_rate(pit_clk); in pit_timer_init()
183 cycle_per_jiffy = clk_rate / (HZ); in pit_timer_init()
188 ret = pit_clocksource_init(clk_rate); in pit_timer_init()
192 return pit_clockevent_init(clk_rate, irq); in pit_timer_init()
/linux-6.15/drivers/watchdog/
H A Dloongson1_wdt.c29 unsigned long clk_rate; member
51 counts = drvdata->clk_rate * min(timeout, max_hw_heartbeat); in ls1x_wdt_set_timeout()
106 unsigned long clk_rate; in ls1x_wdt_probe() local
121 clk_rate = clk_get_rate(drvdata->clk); in ls1x_wdt_probe()
122 if (!clk_rate) in ls1x_wdt_probe()
124 drvdata->clk_rate = clk_rate; in ls1x_wdt_probe()
131 ls1x_wdt->max_hw_heartbeat_ms = U32_MAX / clk_rate * 1000; in ls1x_wdt_probe()
H A Dimgpdc_wdt.c116 unsigned long clk_rate = clk_get_rate(wdt->wdt_clk); in __pdc_wdt_set_timeout() local
120 val |= order_base_2(wdt->wdt_dev.timeout * clk_rate) - 1; in __pdc_wdt_set_timeout()
183 unsigned long clk_rate; in pdc_wdt_probe() local
207 clk_rate = clk_get_rate(pdc_wdt->wdt_clk); in pdc_wdt_probe()
208 if (clk_rate == 0) { in pdc_wdt_probe()
213 if (order_base_2(clk_rate) > PDC_WDT_CONFIG_DELAY_MASK + 1) { in pdc_wdt_probe()
218 if (order_base_2(clk_rate) == 0) in pdc_wdt_probe()
227 do_div(div, clk_rate); in pdc_wdt_probe()
H A Drenesas_wdt.c37 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
40 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
52 unsigned long clk_rate; member
80 delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); in rwdt_wait_cycles()
143 udelay(DIV_ROUND_UP(2 * 1000000, priv->clk_rate)); in rwdt_restart()
155 udelay(DIV_ROUND_UP(2 * 1000000, priv->clk_rate)); in rwdt_restart()
237 priv->clk_rate = clk_get_rate(priv->clk); in rwdt_probe()
242 if (!priv->clk_rate) { in rwdt_probe()
248 clks_per_sec = priv->clk_rate / clk_divs[i]; in rwdt_probe()
H A Dlantiq_wdt.c65 unsigned long clk_rate; member
104 timeout = wdt->timeout * priv->clk_rate; in ltq_wdt_start()
132 timeout = wdt->timeout * priv->clk_rate; in ltq_wdt_ping()
148 return do_div(timeout, priv->clk_rate); in ltq_wdt_get_timeleft()
220 priv->clk_rate = clk_get_rate(clk) / LTQ_WDT_DIVIDER; in ltq_wdt_probe()
221 if (!priv->clk_rate) { in ltq_wdt_probe()
231 wdt->max_timeout = LTQ_WDT_CR_MAX_TIMEOUT / priv->clk_rate; in ltq_wdt_probe()
H A Dapple_wdt.c59 unsigned long clk_rate; member
100 writel_relaxed(wdt->clk_rate * s, wdt->regs + APPLE_WDT_WD1_BITE_TIME); in apple_wdt_set_timeout()
115 return (reset_time - cur_time) / wdt->clk_rate; in apple_wdt_get_timeleft()
172 wdt->clk_rate = clk_get_rate(clk); in apple_wdt_probe()
173 if (!wdt->clk_rate) in apple_wdt_probe()
180 wdt->wdd.max_timeout = U32_MAX / wdt->clk_rate; in apple_wdt_probe()
H A Dlpc18xx_wdt.c55 unsigned long clk_rate; member
107 val = DIV_ROUND_UP(lpc18xx_wdt->wdt_dev.timeout * lpc18xx_wdt->clk_rate, in __lpc18xx_wdt_set_timeout()
129 return (val * LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_get_timeleft()
226 lpc18xx_wdt->clk_rate = clk_get_rate(lpc18xx_wdt->wdt_clk); in lpc18xx_wdt_probe()
227 if (lpc18xx_wdt->clk_rate == 0) { in lpc18xx_wdt_probe()
236 LPC18XX_WDT_CLK_DIV, lpc18xx_wdt->clk_rate); in lpc18xx_wdt_probe()
239 LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_probe()
H A Dorion_wdt.c74 unsigned long clk_rate; member
93 dev->clk_rate = clk_get_rate(dev->clk); in orion_wdt_clock_init()
116 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; in armada370_wdt_clock_init()
136 dev->clk_rate = clk_get_rate(dev->clk); in armada375_wdt_clock_init()
155 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; in armada375_wdt_clock_init()
179 dev->clk_rate = clk_get_rate(dev->clk); in armadaxp_wdt_clock_init()
187 writel(dev->clk_rate * wdt_dev->timeout, in orion_wdt_ping()
202 writel(dev->clk_rate * wdt_dev->timeout, in armada375_start()
232 writel(dev->clk_rate * wdt_dev->timeout, in armada370_start()
256 writel(dev->clk_rate * wdt_dev->timeout, in orion_start()
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/linux-6.15/drivers/mfd/
H A Dintel-lpss-acpi.c37 .clk_rate = 120000000,
51 .clk_rate = 120000000,
67 .clk_rate = 120000000,
82 .clk_rate = 100000000,
98 .clk_rate = 133000000,
114 .clk_rate = 133000000,
128 .clk_rate = 120000000,
133 .clk_rate = 216000000,
/linux-6.15/drivers/pwm/
H A Dpwm-omap-dmtimer.c82 return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC); in pwm_omap_dmtimer_get_clock_cycles()
153 unsigned long clk_rate; in pwm_omap_dmtimer_config() local
169 clk_rate = clk_get_rate(fclk); in pwm_omap_dmtimer_config()
170 if (!clk_rate) { in pwm_omap_dmtimer_config()
175 dev_dbg(pwmchip_parent(chip), "clk rate: %luHz\n", clk_rate); in pwm_omap_dmtimer_config()
194 duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns); in pwm_omap_dmtimer_config()
199 period_ns, clk_rate); in pwm_omap_dmtimer_config()
206 duty_ns, clk_rate); in pwm_omap_dmtimer_config()
212 duty_ns, period_ns, clk_rate); in pwm_omap_dmtimer_config()
219 clk_rate), in pwm_omap_dmtimer_config()
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H A Dpwm-sunplus.c60 u64 clk_rate; in sunplus_pwm_apply() local
77 clk_rate = clk_get_rate(priv->clk); in sunplus_pwm_apply()
84 if (clk_rate > (u64)SP7021_PWM_FREQ_SCALER * NSEC_PER_SEC) in sunplus_pwm_apply()
91 dd_freq = mul_u64_u64_div_u64(clk_rate, state->period, (u64)SP7021_PWM_FREQ_SCALER in sunplus_pwm_apply()
116 duty = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, in sunplus_pwm_apply()
132 u64 clk_rate; in sunplus_pwm_get_state() local
137 clk_rate = clk_get_rate(priv->clk); in sunplus_pwm_get_state()
146 * NSEC_PER_SEC, clk_rate); in sunplus_pwm_get_state()
151 clk_rate); in sunplus_pwm_get_state()
H A Dpwm-keembay.c96 unsigned long clk_rate; in keembay_pwm_get_state() local
99 clk_rate = clk_get_rate(priv->clk); in keembay_pwm_get_state()
112 state->duty_cycle = DIV_ROUND_UP_ULL(high, clk_rate); in keembay_pwm_get_state()
113 state->period = DIV_ROUND_UP_ULL(high + low, clk_rate); in keembay_pwm_get_state()
125 unsigned long clk_rate; in keembay_pwm_apply() local
153 clk_rate = clk_get_rate(priv->clk); in keembay_pwm_apply()
154 div = clk_rate * state->duty_cycle; in keembay_pwm_apply()
160 div = clk_rate * state->period; in keembay_pwm_apply()
H A Dpwm-sun4i.c114 u64 clk_rate, tmp; in sun4i_pwm_get_state() local
118 clk_rate = clk_get_rate(sun4ichip->clk); in sun4i_pwm_get_state()
119 if (!clk_rate) in sun4i_pwm_get_state()
164 state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); in sun4i_pwm_get_state()
174 u64 clk_rate, div = 0; in sun4i_pwm_calculate() local
177 clk_rate = clk_get_rate(sun4ichip->clk); in sun4i_pwm_calculate()
181 (state->period * clk_rate >= NSEC_PER_SEC) && in sun4i_pwm_calculate()
182 (state->period * clk_rate < 2 * NSEC_PER_SEC) && in sun4i_pwm_calculate()
183 (state->duty_cycle * clk_rate * 2 >= NSEC_PER_SEC); in sun4i_pwm_calculate()
197 div = clk_rate * state->period + NSEC_PER_SEC / 2; in sun4i_pwm_calculate()
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H A Dpwm-microchip-core.c133 static u64 mchp_core_pwm_calc_duty(const struct pwm_state *state, u64 clk_rate, in mchp_core_pwm_calc_duty() argument
145 duty_steps = mul_u64_u64_div_u64(state->duty_cycle, clk_rate, tmp); in mchp_core_pwm_calc_duty()
184 static int mchp_core_pwm_calc_period(const struct pwm_state *state, unsigned long clk_rate, in mchp_core_pwm_calc_period() argument
211 tmp = mul_u64_u64_div_u64(state->period, clk_rate, NSEC_PER_SEC); in mchp_core_pwm_calc_period()
278 unsigned long clk_rate; in mchp_core_pwm_apply_locked() local
293 clk_rate = clk_get_rate(mchp_core_pwm->clk); in mchp_core_pwm_apply_locked()
294 if (clk_rate >= NSEC_PER_SEC) in mchp_core_pwm_apply_locked()
297 ret = mchp_core_pwm_calc_period(state, clk_rate, &prescale, &period_steps); in mchp_core_pwm_apply_locked()
337 duty_steps = mchp_core_pwm_calc_duty(state, clk_rate, prescale, period_steps); in mchp_core_pwm_apply_locked()
H A Dpwm-lpss.c38 .clk_rate = 25000000,
46 .clk_rate = 19200000,
55 .clk_rate = 19200000,
64 .clk_rate = 19200000,
129 unsigned long c = lpwm->info->clk_rate, base_unit_range; in pwm_lpss_prepare()
225 freq = base_unit * lpwm->info->clk_rate; in pwm_lpss_get_state()
269 c = lpwm->info->clk_rate; in devm_pwm_lpss_probe()
H A Dpwm-rcar.c75 unsigned long clk_rate = clk_get_rate(rp->clk); in rcar_pwm_get_clock_division() local
78 if (clk_rate == 0) in rcar_pwm_get_clock_division()
82 tmp = (u64)period_ns * clk_rate + div - 1; in rcar_pwm_get_clock_division()
110 unsigned long clk_rate = clk_get_rate(rp->clk); in rcar_pwm_set_counter() local
114 tmp = mul_u64_u64_div_u64(period_ns, clk_rate, (u64)NSEC_PER_SEC << div); in rcar_pwm_set_counter()
120 tmp = mul_u64_u64_div_u64(duty_ns, clk_rate, (u64)NSEC_PER_SEC << div); in rcar_pwm_set_counter()
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_core_perf.c274 u64 clk_rate; in _dpu_core_perf_get_core_clk_rate() local
284 clk_rate = 0; in _dpu_core_perf_get_core_clk_rate()
288 clk_rate = max(dpu_cstate->new_perf.core_clk_rate, in _dpu_core_perf_get_core_clk_rate()
289 clk_rate); in _dpu_core_perf_get_core_clk_rate()
293 return clk_rate; in _dpu_core_perf_get_core_clk_rate()
307 u64 clk_rate = 0; in dpu_core_perf_crtc_update() local
378 clk_rate = _dpu_core_perf_get_core_clk_rate(kms); in dpu_core_perf_crtc_update()
380 DRM_DEBUG_ATOMIC("clk:%llu\n", clk_rate); in dpu_core_perf_crtc_update()
384 clk_rate = min(clk_rate, kms->perf.max_core_clk_rate); in dpu_core_perf_crtc_update()
385 ret = dev_pm_opp_set_rate(&kms->pdev->dev, clk_rate); in dpu_core_perf_crtc_update()
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/linux-6.15/arch/m68k/include/asm/
H A Dmcfclk.h32 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \ argument
35 .rate = clk_rate, \
42 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \ argument
44 .rate = clk_rate, \
/linux-6.15/sound/soc/fsl/
H A Dfsl_utils.c173 u64 clk_rate[3]; in fsl_asoc_constrain_rates() local
180 clk_rate[0] = clk_get_rate(pll8k_clk); in fsl_asoc_constrain_rates()
181 clk_rate[1] = clk_get_rate(pll11k_clk); in fsl_asoc_constrain_rates()
182 clk_rate[2] = clk_get_rate(ext_clk); in fsl_asoc_constrain_rates()
184 if (clk_rate[j] != 0 && in fsl_asoc_constrain_rates()
185 do_div(clk_rate[j], original_constr->list[i]) == 0) { in fsl_asoc_constrain_rates()
/linux-6.15/drivers/memory/
H A Dti-aemif.c113 unsigned long clk_rate; member
301 unsigned long clk_rate = aemif->clk_rate; in of_aemif_parse_abus_config() local
329 data->timings.ta = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
332 data->timings.rhold = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
335 data->timings.rstrobe = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
338 data->timings.rsetup = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
341 data->timings.whold = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
344 data->timings.wstrobe = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
347 data->timings.wsetup = aemif_calc_rate(pdev, val, clk_rate); in of_aemif_parse_abus_config()
384 aemif->clk_rate = clk_get_rate(aemif->clk) / MSEC_PER_SEC; in aemif_probe()
/linux-6.15/sound/soc/loongson/
H A Dloongson_i2s.c64 u32 clk_rate = i2s->clk_rate; in loongson_i2s_hw_params() local
75 bclk_ratio = DIV_ROUND_CLOSEST(clk_rate, in loongson_i2s_hw_params()
77 mclk_ratio = DIV_ROUND_CLOSEST(clk_rate, (sysclk * 2)) - 1; in loongson_i2s_hw_params()
90 mclk_ratio = clk_rate / sysclk; in loongson_i2s_hw_params()
91 mclk_ratio_frac = DIV_ROUND_CLOSEST_ULL(((u64)clk_rate << 16), in loongson_i2s_hw_params()
/linux-6.15/drivers/hwmon/
H A Daspeed-g6-pwm-tach.c138 unsigned long clk_rate; member
173 state->period = DIV_ROUND_UP_ULL(dividend, priv->clk_rate); in aspeed_pwm_get_state()
178 state->duty_cycle = DIV_ROUND_UP_ULL(dividend, priv->clk_rate); in aspeed_pwm_get_state()
195 expect_period = div64_u64(ULLONG_MAX, (u64)priv->clk_rate); in aspeed_pwm_apply()
205 div_h = order_base_2(DIV64_U64_ROUND_UP(priv->clk_rate * expect_period, divisor)); in aspeed_pwm_apply()
210 div_l = div64_u64(priv->clk_rate * expect_period, divisor); in aspeed_pwm_apply()
221 priv->clk_rate, div_h, div_l); in aspeed_pwm_apply()
223 duty_pt = div64_u64(state->duty_cycle * priv->clk_rate, in aspeed_pwm_apply()
293 priv->clk_rate, tach_val, tach_div); in aspeed_tach_val_to_rpm()
295 rpm = (u64)priv->clk_rate * 60; in aspeed_tach_val_to_rpm()
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