Home
last modified time | relevance | path

Searched refs:clk_ctrl (Results 1 – 25 of 42) sorted by relevance

12

/linux-6.15/arch/mips/ath79/
H A Dclock.c356 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca953x_clocks_init() local
401 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca953x_clocks_init()
411 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca953x_clocks_init()
421 if (clk_ctrl & QCA953X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca953x_clocks_init()
439 u32 pll, out_div, ref_div, nint, frac, clk_ctrl, postdiv; in qca955x_clocks_init() local
484 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca955x_clocks_init()
494 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca955x_clocks_init()
504 if (clk_ctrl & QCA955X_PLL_CLK_CTRL_AHB_PLL_BYPASS) in qca955x_clocks_init()
586 if (clk_ctrl & QCA956X_PLL_CLK_CTRL_CPU_PLL_BYPASS) in qca956x_clocks_init()
596 if (clk_ctrl & QCA956X_PLL_CLK_CTRL_DDR_PLL_BYPASS) in qca956x_clocks_init()
[all …]
/linux-6.15/drivers/gpu/drm/msm/disp/dpu1/catalog/
H A Ddpu_1_7_msm8996.h70 .clk_ctrl = DPU_CLK_CTRL_VIG0,
78 .clk_ctrl = DPU_CLK_CTRL_VIG1,
86 .clk_ctrl = DPU_CLK_CTRL_VIG2,
94 .clk_ctrl = DPU_CLK_CTRL_VIG3,
102 .clk_ctrl = DPU_CLK_CTRL_RGB0,
110 .clk_ctrl = DPU_CLK_CTRL_RGB1,
118 .clk_ctrl = DPU_CLK_CTRL_RGB2,
126 .clk_ctrl = DPU_CLK_CTRL_RGB3,
134 .clk_ctrl = DPU_CLK_CTRL_DMA0,
142 .clk_ctrl = DPU_CLK_CTRL_DMA1,
H A Ddpu_3_0_msm8998.h75 .clk_ctrl = DPU_CLK_CTRL_VIG0,
83 .clk_ctrl = DPU_CLK_CTRL_VIG1,
91 .clk_ctrl = DPU_CLK_CTRL_VIG2,
99 .clk_ctrl = DPU_CLK_CTRL_VIG3,
107 .clk_ctrl = DPU_CLK_CTRL_DMA0,
115 .clk_ctrl = DPU_CLK_CTRL_DMA1,
123 .clk_ctrl = DPU_CLK_CTRL_DMA2,
131 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_4_1_sdm670.h32 .clk_ctrl = DPU_CLK_CTRL_VIG0,
40 .clk_ctrl = DPU_CLK_CTRL_VIG0,
48 .clk_ctrl = DPU_CLK_CTRL_DMA0,
56 .clk_ctrl = DPU_CLK_CTRL_DMA1,
64 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_4_0_sdm845.h73 .clk_ctrl = DPU_CLK_CTRL_VIG0,
81 .clk_ctrl = DPU_CLK_CTRL_VIG1,
89 .clk_ctrl = DPU_CLK_CTRL_VIG2,
97 .clk_ctrl = DPU_CLK_CTRL_VIG3,
105 .clk_ctrl = DPU_CLK_CTRL_DMA0,
113 .clk_ctrl = DPU_CLK_CTRL_DMA1,
121 .clk_ctrl = DPU_CLK_CTRL_DMA2,
129 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_5_0_sm8150.h83 .clk_ctrl = DPU_CLK_CTRL_VIG0,
91 .clk_ctrl = DPU_CLK_CTRL_VIG1,
99 .clk_ctrl = DPU_CLK_CTRL_VIG2,
107 .clk_ctrl = DPU_CLK_CTRL_VIG3,
115 .clk_ctrl = DPU_CLK_CTRL_DMA0,
123 .clk_ctrl = DPU_CLK_CTRL_DMA1,
131 .clk_ctrl = DPU_CLK_CTRL_DMA2,
139 .clk_ctrl = DPU_CLK_CTRL_DMA3,
303 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_0_sm8250.h81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
89 .clk_ctrl = DPU_CLK_CTRL_VIG1,
97 .clk_ctrl = DPU_CLK_CTRL_VIG2,
105 .clk_ctrl = DPU_CLK_CTRL_VIG3,
113 .clk_ctrl = DPU_CLK_CTRL_DMA0,
121 .clk_ctrl = DPU_CLK_CTRL_DMA1,
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
343 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_7_0_sm8350.h81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
89 .clk_ctrl = DPU_CLK_CTRL_VIG1,
97 .clk_ctrl = DPU_CLK_CTRL_VIG2,
105 .clk_ctrl = DPU_CLK_CTRL_VIG3,
113 .clk_ctrl = DPU_CLK_CTRL_DMA0,
121 .clk_ctrl = DPU_CLK_CTRL_DMA1,
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
310 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_3_sm6150.h76 .clk_ctrl = DPU_CLK_CTRL_VIG0,
84 .clk_ctrl = DPU_CLK_CTRL_DMA0,
92 .clk_ctrl = DPU_CLK_CTRL_DMA1,
100 .clk_ctrl = DPU_CLK_CTRL_DMA2,
108 .clk_ctrl = DPU_CLK_CTRL_DMA3,
173 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_1_sc8180x.h82 .clk_ctrl = DPU_CLK_CTRL_VIG0,
90 .clk_ctrl = DPU_CLK_CTRL_VIG1,
98 .clk_ctrl = DPU_CLK_CTRL_VIG2,
106 .clk_ctrl = DPU_CLK_CTRL_VIG3,
114 .clk_ctrl = DPU_CLK_CTRL_DMA0,
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
138 .clk_ctrl = DPU_CLK_CTRL_DMA3,
310 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_8_1_sm8450.h82 .clk_ctrl = DPU_CLK_CTRL_VIG0,
90 .clk_ctrl = DPU_CLK_CTRL_VIG1,
98 .clk_ctrl = DPU_CLK_CTRL_VIG2,
106 .clk_ctrl = DPU_CLK_CTRL_VIG3,
114 .clk_ctrl = DPU_CLK_CTRL_DMA0,
122 .clk_ctrl = DPU_CLK_CTRL_DMA1,
130 .clk_ctrl = DPU_CLK_CTRL_DMA2,
138 .clk_ctrl = DPU_CLK_CTRL_DMA3,
326 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_8_4_sa8775p.h81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
89 .clk_ctrl = DPU_CLK_CTRL_VIG1,
97 .clk_ctrl = DPU_CLK_CTRL_VIG2,
105 .clk_ctrl = DPU_CLK_CTRL_VIG3,
113 .clk_ctrl = DPU_CLK_CTRL_DMA0,
121 .clk_ctrl = DPU_CLK_CTRL_DMA1,
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
335 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_2_sc7180.h58 .clk_ctrl = DPU_CLK_CTRL_VIG0,
66 .clk_ctrl = DPU_CLK_CTRL_DMA0,
74 .clk_ctrl = DPU_CLK_CTRL_DMA1,
82 .clk_ctrl = DPU_CLK_CTRL_DMA2,
162 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_6_4_sm6350.h66 .clk_ctrl = DPU_CLK_CTRL_VIG0,
74 .clk_ctrl = DPU_CLK_CTRL_DMA0,
82 .clk_ctrl = DPU_CLK_CTRL_DMA1,
90 .clk_ctrl = DPU_CLK_CTRL_DMA2,
156 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_1_15_msm8917.h54 .clk_ctrl = DPU_CLK_CTRL_VIG0,
62 .clk_ctrl = DPU_CLK_CTRL_RGB0,
70 .clk_ctrl = DPU_CLK_CTRL_RGB1,
78 .clk_ctrl = DPU_CLK_CTRL_DMA0,
H A Ddpu_1_14_msm8937.h54 .clk_ctrl = DPU_CLK_CTRL_VIG0,
62 .clk_ctrl = DPU_CLK_CTRL_RGB0,
70 .clk_ctrl = DPU_CLK_CTRL_RGB1,
78 .clk_ctrl = DPU_CLK_CTRL_DMA0,
H A Ddpu_7_2_sc7280.h63 .clk_ctrl = DPU_CLK_CTRL_VIG0,
71 .clk_ctrl = DPU_CLK_CTRL_DMA0,
79 .clk_ctrl = DPU_CLK_CTRL_DMA1,
87 .clk_ctrl = DPU_CLK_CTRL_DMA2,
174 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_5_2_sm7150.h79 .clk_ctrl = DPU_CLK_CTRL_VIG0,
87 .clk_ctrl = DPU_CLK_CTRL_VIG1,
95 .clk_ctrl = DPU_CLK_CTRL_DMA0,
103 .clk_ctrl = DPU_CLK_CTRL_DMA1,
111 .clk_ctrl = DPU_CLK_CTRL_DMA2,
266 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_8_0_sc8280xp.h81 .clk_ctrl = DPU_CLK_CTRL_VIG0,
89 .clk_ctrl = DPU_CLK_CTRL_VIG1,
97 .clk_ctrl = DPU_CLK_CTRL_VIG2,
105 .clk_ctrl = DPU_CLK_CTRL_VIG3,
113 .clk_ctrl = DPU_CLK_CTRL_DMA0,
121 .clk_ctrl = DPU_CLK_CTRL_DMA1,
129 .clk_ctrl = DPU_CLK_CTRL_DMA2,
137 .clk_ctrl = DPU_CLK_CTRL_DMA3,
H A Ddpu_3_2_sdm660.h70 .clk_ctrl = DPU_CLK_CTRL_VIG0,
78 .clk_ctrl = DPU_CLK_CTRL_VIG1,
86 .clk_ctrl = DPU_CLK_CTRL_DMA0,
94 .clk_ctrl = DPU_CLK_CTRL_DMA1,
102 .clk_ctrl = DPU_CLK_CTRL_DMA2,
H A Ddpu_1_16_msm8953.h54 .clk_ctrl = DPU_CLK_CTRL_VIG0,
62 .clk_ctrl = DPU_CLK_CTRL_RGB0,
70 .clk_ctrl = DPU_CLK_CTRL_RGB1,
78 .clk_ctrl = DPU_CLK_CTRL_DMA0,
H A Ddpu_5_4_sm6125.h76 .clk_ctrl = DPU_CLK_CTRL_VIG0,
84 .clk_ctrl = DPU_CLK_CTRL_DMA0,
92 .clk_ctrl = DPU_CLK_CTRL_DMA1,
150 .clk_ctrl = DPU_CLK_CTRL_WB2,
H A Ddpu_3_3_sdm630.h69 .clk_ctrl = DPU_CLK_CTRL_VIG0,
77 .clk_ctrl = DPU_CLK_CTRL_DMA0,
85 .clk_ctrl = DPU_CLK_CTRL_DMA1,
93 .clk_ctrl = DPU_CLK_CTRL_DMA2,
/linux-6.15/include/linux/platform_data/
H A Dnet-cw1200.h19 int (*clk_ctrl)(const struct cw1200_platform_data_spi *pdata, member
34 int (*clk_ctrl)(const struct cw1200_platform_data_sdio *pdata, member
/linux-6.15/drivers/net/wireless/st/cw1200/
H A Dcw1200_sdio.c194 if (pdata->clk_ctrl) in cw1200_sdio_off()
195 pdata->clk_ctrl(pdata, false); in cw1200_sdio_off()
228 if (pdata->clk_ctrl) { in cw1200_sdio_on()
229 if (pdata->clk_ctrl(pdata, true)) { in cw1200_sdio_on()

12