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Searched refs:clk_cfg (Results 1 – 15 of 15) sorted by relevance

/linux-6.15/sound/soc/cirrus/
H A Dep93xx-i2s.c215 unsigned int clk_cfg; in ep93xx_i2s_set_dai_fmt() local
223 clk_cfg |= EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()
227 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()
231 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()
243 clk_cfg |= EP93XX_I2S_CLKCFG_MASTER; in ep93xx_i2s_set_dai_fmt()
248 clk_cfg &= ~EP93XX_I2S_CLKCFG_MASTER; in ep93xx_i2s_set_dai_fmt()
263 clk_cfg &= ~EP93XX_I2S_CLKCFG_CKP; in ep93xx_i2s_set_dai_fmt()
264 clk_cfg |= EP93XX_I2S_CLKCFG_LRS; in ep93xx_i2s_set_dai_fmt()
269 clk_cfg |= EP93XX_I2S_CLKCFG_CKP; in ep93xx_i2s_set_dai_fmt()
270 clk_cfg &= ~EP93XX_I2S_CLKCFG_LRS; in ep93xx_i2s_set_dai_fmt()
[all …]
/linux-6.15/sound/soc/xilinx/
H A Dxlnx_spdif.c109 u32 val, clk_div, clk_cfg; in xlnx_spdif_hw_params() local
117 clk_cfg = 0; in xlnx_spdif_hw_params()
120 clk_cfg = 1; in xlnx_spdif_hw_params()
123 clk_cfg = 2; in xlnx_spdif_hw_params()
126 clk_cfg = 3; in xlnx_spdif_hw_params()
129 clk_cfg = 4; in xlnx_spdif_hw_params()
132 clk_cfg = 5; in xlnx_spdif_hw_params()
135 clk_cfg = 6; in xlnx_spdif_hw_params()
143 val |= clk_cfg << XSPDIF_CLOCK_CONFIG_BITS_SHIFT; in xlnx_spdif_hw_params()
/linux-6.15/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_mipi_dsi.c41 const struct dsi_clk_config *clk_cfg; member
387 const struct dsi_clk_config *clk_cfg; in rcar_mipi_dsi_parameters_calc() local
403 for (clk_cfg = dsi->info->clk_cfg; clk_cfg->min_freq != 0; clk_cfg++) { in rcar_mipi_dsi_parameters_calc()
404 if (fout_target > clk_cfg->min_freq && in rcar_mipi_dsi_parameters_calc()
405 fout_target <= clk_cfg->max_freq) { in rcar_mipi_dsi_parameters_calc()
406 setup_info->clkset = clk_cfg; in rcar_mipi_dsi_parameters_calc()
416 setup_info->vclk_divider = 1 << ((clk_cfg->vco_cntrl >> 4) & 0x3); in rcar_mipi_dsi_parameters_calc()
420 setup_info->vclk_divider = 1 << (((clk_cfg->vco_cntrl >> 3) & 0x7) + 1); in rcar_mipi_dsi_parameters_calc()
445 clk_cfg->vco_cntrl, clk_cfg->prop_cntrl, in rcar_mipi_dsi_parameters_calc()
1053 .clk_cfg = dsi_clk_cfg_v3u,
[all …]
/linux-6.15/drivers/gpio/
H A Dgpio-npcm-sgpio.c284 const struct npcm_clk_cfg *clk_cfg) in npcm_sgpio_setup_clk() argument
294 for (i = clk_cfg->cfg_opt-1; i > 0; i--) { in npcm_sgpio_setup_clk()
295 val = apb_freq / clk_cfg->sft_clk[i]; in npcm_sgpio_setup_clk()
297 iowrite8(clk_cfg->clk_sel[i] | tmp, in npcm_sgpio_setup_clk()
502 const struct npcm_clk_cfg *clk_cfg; in npcm_sgpio_probe() local
514 clk_cfg = device_get_match_data(&pdev->dev); in npcm_sgpio_probe()
515 if (!clk_cfg) in npcm_sgpio_probe()
538 rc = npcm_sgpio_setup_clk(gpio, clk_cfg); in npcm_sgpio_probe()
/linux-6.15/drivers/media/i2c/
H A Dimx290.c214 const struct imx290_clk_cfg *clk_cfg; member
556 .clk_cfg = imx290_1080p_clock_config,
567 .clk_cfg = imx290_720p_clock_config,
581 .clk_cfg = imx290_1080p_clock_config,
592 .clk_cfg = imx290_720p_clock_config,
674 const struct imx290_clk_cfg *clk_cfg = &mode->clk_cfg[clk_idx]; in imx290_set_clock() local
680 cci_write(imx290->regmap, IMX290_INCKSEL1, clk_cfg->incksel1, &ret); in imx290_set_clock()
681 cci_write(imx290->regmap, IMX290_INCKSEL2, clk_cfg->incksel2, &ret); in imx290_set_clock()
682 cci_write(imx290->regmap, IMX290_INCKSEL3, clk_cfg->incksel3, &ret); in imx290_set_clock()
683 cci_write(imx290->regmap, IMX290_INCKSEL4, clk_cfg->incksel4, &ret); in imx290_set_clock()
[all …]
/linux-6.15/drivers/gpu/drm/bridge/imx/
H A Dimx93-mipi-dsi.c97 struct clk *clk_cfg; member
317 return (clk_get_rate(dsi->clk_cfg) / MHZ(1) - 17) * 4; in dphy_pll_get_cfgclkrange()
444 ret = clk_prepare_enable(dsi->clk_cfg); in dphy_pll_init()
458 clk_disable_unprepare(dsi->clk_cfg); in dphy_pll_uninit()
855 dsi->clk_cfg = devm_clk_get(dev, "phy_cfg"); in imx93_dsi_probe()
856 if (IS_ERR(dsi->clk_cfg)) in imx93_dsi_probe()
857 return dev_err_probe(dev, PTR_ERR(dsi->clk_cfg), in imx93_dsi_probe()
/linux-6.15/drivers/spi/
H A Dspi-bcm63xx.c190 u8 clk_cfg, reg; in bcm63xx_spi_setup_transfer() local
194 clk_cfg = SPI_CLK_0_391MHZ; in bcm63xx_spi_setup_transfer()
199 clk_cfg = bcm63xx_spi_freq_table[i][1]; in bcm63xx_spi_setup_transfer()
207 reg |= clk_cfg; in bcm63xx_spi_setup_transfer()
211 clk_cfg, t->speed_hz); in bcm63xx_spi_setup_transfer()
/linux-6.15/drivers/tty/serial/
H A Drp2.c577 u32 clk_cfg; in rp2_reset_asic() local
585 clk_cfg = readw(base + RP2_ASIC_CFG); in rp2_reset_asic()
586 clk_cfg = (clk_cfg & ~BIT(8)) | BIT(9); in rp2_reset_asic()
587 writew(clk_cfg, base + RP2_ASIC_CFG); in rp2_reset_asic()
/linux-6.15/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddisplay_mode_util.c687 __DML_DLL_EXPORT__ void dml_print_clk_cfg(const struct dml_clk_cfg_st *clk_cfg) in dml_print_clk_cfg() argument
690 dml_print("DML: clk_cfg: dcfclk_option = %d\n", clk_cfg->dcfclk_option); in dml_print_clk_cfg()
691 dml_print("DML: clk_cfg: dispclk_option = %d\n", clk_cfg->dispclk_option); in dml_print_clk_cfg()
693 dml_print("DML: clk_cfg: dcfclk_mhz = %f\n", clk_cfg->dcfclk_mhz); in dml_print_clk_cfg()
694 dml_print("DML: clk_cfg: dispclk_mhz = %f\n", clk_cfg->dispclk_mhz); in dml_print_clk_cfg()
697 dml_print("DML: clk_cfg: i=%d, dppclk_option = %d\n", i, clk_cfg->dppclk_option[i]); in dml_print_clk_cfg()
698 dml_print("DML: clk_cfg: i=%d, dppclk_mhz = %f\n", i, clk_cfg->dppclk_mhz[i]); in dml_print_clk_cfg()
H A Ddisplay_mode_util.h67 __DML_DLL_EXPORT__ void dml_print_clk_cfg(const struct dml_clk_cfg_st *clk_cfg);
H A Ddisplay_mode_core.h35 …_core_mode_programming(struct display_mode_lib_st *mode_lib, const struct dml_clk_cfg_st *clk_cfg);
H A Ddisplay_mode_core.c8320 if (clk_cfg->dcfclk_option != dml_use_override_freq) in dml_core_mode_programming()
8323 locals->Dcfclk = clk_cfg->dcfclk_mhz; in dml_core_mode_programming()
8329 dml_print_clk_cfg(clk_cfg); in dml_core_mode_programming()
8376 locals->Dispclk = clk_cfg->dispclk_mhz; in dml_core_mode_programming()
8417 locals->Dppclk[k] = clk_cfg->dppclk_mhz[k]; in dml_core_mode_programming()
10128 struct dml_clk_cfg_st clk_cfg; in dml_mode_programming() local
10129 memset(&clk_cfg, 0, sizeof(clk_cfg)); in dml_mode_programming()
10131 clk_cfg.dcfclk_option = dml_use_required_freq; in dml_mode_programming()
10132 clk_cfg.dispclk_option = dml_use_required_freq; in dml_mode_programming()
10134 clk_cfg.dppclk_option[k] = dml_use_required_freq; in dml_mode_programming()
[all …]
/linux-6.15/sound/soc/codecs/
H A Dcs35l36.c61 int clk_cfg; member
997 const struct cs35l36_pll_config *clk_cfg; in cs35l36_component_set_sysclk() local
1023 clk_cfg = cs35l36_get_clk_config(cs35l36, freq); in cs35l36_component_set_sysclk()
1024 if (clk_cfg == NULL) { in cs35l36_component_set_sysclk()
1034 clk_cfg->clk_cfg << CS35L36_REFCLK_FREQ_SHIFT); in cs35l36_component_set_sysclk()
1063 clk_cfg->fll_igain); in cs35l36_component_set_sysclk()
H A Dcs35l41.c34 int clk_cfg; member
805 return cs35l41_pll_sysclk[i].clk_cfg; in cs35l41_get_clk_config()
H A Dcs35l35.c402 u8 clk_cfg; member
457 return cs35l35_clk_ctl[i].clk_cfg; in cs35l35_get_clk_config()