Searched refs:cik (Results 1 – 6 of 6) sorted by relevance
3184 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3201 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3218 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3237 rdev->config.cik.max_gprs = 256; in cik_gpu_init()3267 rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; in cik_gpu_init()3275 rdev->config.cik.num_gpus = 1; in cik_gpu_init()3317 rdev->config.cik.tile_config |= in cik_gpu_init()3319 rdev->config.cik.tile_config |= in cik_gpu_init()3321 rdev->config.cik.tile_config |= in cik_gpu_init()3339 rdev->config.cik.active_cus = 0; in cik_gpu_init()[all …]
298 *value = rdev->config.cik.tile_config; in radeon_info_ioctl()353 rdev->config.cik.max_shader_engines; in radeon_info_ioctl()372 *value = rdev->config.cik.max_tile_pipes; in radeon_info_ioctl()392 *value = rdev->config.cik.backend_map; in radeon_info_ioctl()421 *value = rdev->config.cik.max_cu_per_sh; in radeon_info_ioctl()447 *value = rdev->config.cik.max_shader_engines; in radeon_info_ioctl()459 *value = rdev->config.cik.max_sh_per_se; in radeon_info_ioctl()494 value = rdev->config.cik.tile_mode_array; in radeon_info_ioctl()506 value = rdev->config.cik.macrotile_mode_array; in radeon_info_ioctl()518 *value = rdev->config.cik.backend_enable_mask; in radeon_info_ioctl()[all …]
47 radeon_prime.o cik.o \
1290 num_banks = (rdev->config.cik.macrotile_mode_array[index] >> 6) & 0x3; in dce4_crtc_do_set_base()1346 u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; in dce4_crtc_do_set_base()
749 struct cik_irq_stat_regs cik; member2193 struct cik_asic cik; member
76 amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o \