Searched refs:channel1 (Results 1 – 25 of 34) sorted by relevance
12
52 description: This option sets this GPIO channel1 bits in input mode.60 description: This option sets this GPIO channel1 bits in output mode.69 channel1.80 description: The value defines the bit width of the GPIO channel1.110 of each bit of GPIO channel1.
36 channel1 {
52 channel1 {
90 channel1 {
280 channel1 {
434 channel1 {
580 channel1 {
534 channel1 {
529 channel1 {
633 channel1 {
588 channel1 {
1041 channel1 {
746 channel1 {
1073 channel1 {
24 have to be different. Channel0 outputs odd pixels and channel1 outputs30 data. In split mode, channel0 outputs odd pixels and channel1 outputs even
106 - channel1212 channel1 {
672 bool channel1; in sys2pmi() local676 channel1 = mot_hit ? ((bool)((addr >> mot_intlv_bit) & 1)) : in sys2pmi()678 *pmiidx |= (u32)channel1; in sys2pmi()704 bool channel1; in sys2pmi() local711 channel1 = (addr >> mot_intlv_bit) & 1; in sys2pmi()714 channel1 = hash_by_mask(contig_addr, chan_hash_mask); in sys2pmi()717 *pmiidx |= (u32)channel1; in sys2pmi()
37 Index 0 is for LVDS channel0 and index 1 is for LVDS channel1.
125 lpddr-channel1 {
65 id=channel1,name=trace-path-cpu0\
333 channel1 {353 channel1 {
127 - channel1: index: 1, type: be:u32/32>>0
202 __u8 channel1; member
1359 volume.channel1 = 255; in ubd_ioctl()
3149 volctrl.channel1 = buffer[offset+11]; in mmc_ioctl_cdrom_volume()3165 buffer[offset + 11] = volctrl.channel1 & mask[offset + 11]; in mmc_ioctl_cdrom_volume()