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Searched refs:cfgBIFPLR5_PCIE_VC1_RESOURCE_CAP (Results 1 – 2 of 2) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_7_0_offset.h3149 #define cfgBIFPLR5_PCIE_VC1_RESOURCE_CAP … macro
H A Dnbio_7_2_0_offset.h3536 #define cfgBIFPLR5_PCIE_VC1_RESOURCE_CAP … macro